Patents by Inventor Randal Chance

Randal Chance has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7375793
    Abstract: Photolithographic processing apparatus and methods are disclosed. In one embodiment, a method of photolithographically patterning a surface of a substrate includes forming a photoreactive layer on the surface of the substrate, transmitting light through a first patterning portion of a first photolithographic mask to expose a first patterned portion of the photoreactive layer, transmitting light through a second patterning portion of a second photolithographic mask to expose a second patterned portion of the photoreactive layer. In an alternate embodiment, transmitting light through the first patterning portion of the first photolithographic mask is performed simultaneously with transmitting light through the second patterning portion of the second photolithographic mask. In a further embodiment, the light being transmitted through the second patterning portion of a second photolithographic mask has already been transmitted through a first transparent portion of the first photolithographic mask.
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: May 20, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Kevin Duesman, Randal Chance
  • Publication number: 20070190463
    Abstract: Alignment tolerances between narrow mask lines, for forming interconnects in the array region of an integrated circuit, and wider mask lines, for forming interconnects in the periphery of the integrated circuit, are increased. The narrow mask lines are formed by pitch multiplication and the wider mask lines are formed by photolithography. The wider mask lines and are aligned so that one side of those lines is flush with or inset from a corresponding side of the narrow lines. Being wider, the opposite sides of the wider mask lines protrude beyond the corresponding opposite sides of the narrow mask lines. The wider mask lines are formed in negative photoresist having a height less than the height of the narrow mask lines. Advantageously, the narrow mask lines can prevent expansion of the mask lines in one direction, thus increasing alignment tolerances in that direction.
    Type: Application
    Filed: March 26, 2007
    Publication date: August 16, 2007
    Applicant: Micron Technology, Inc.
    Inventors: Gurtej Sandhu, Randal Chance, William Rericha
  • Publication number: 20060255505
    Abstract: The invention comprises methods of patterning a plurality of substrates, and imprint templates used in imprint lithography. In one implementation, a method of patterning a plurality of substrates includes providing an imprint template having a plurality of spaced features. A first substrate is imprinted with the imprint template effective to form a plurality of recesses into the first substrate from the spaced features. After imprinting the first substrate, an elevationally outermost portion of the spaced features is removed effective to reduce elevation of the spaced features. After the removing, a second substrate is imprinted with the imprint template using the elevation-reduced spaced features effective to form a plurality of recesses into the second substrate from the elevation-reduced spaced features. Other aspects and implementations are contemplated.
    Type: Application
    Filed: May 11, 2005
    Publication date: November 16, 2006
    Inventors: Gurtej Sandhu, Randal Chance
  • Publication number: 20060240362
    Abstract: Alignment tolerances between narrow mask lines, for forming interconnects in the array region of an integrated circuit, and wider mask lines, for forming interconnects in the periphery of the integrated circuit, are increased. The narrow mask lines are formed by pitch multiplication and the wider mask lines are formed by photolithography. The wider mask lines and are aligned so that one side of those lines is flush with or inset from a corresponding side of the narrow lines. Being wider, the opposite sides of the wider mask lines protrude beyond the corresponding opposite sides of the narrow mask lines. The wider mask lines are formed in negative photoresist having a height less than the height of the narrow mask lines. Advantageously, the narrow mask lines can prevent expansion of the mask lines in one direction, thus increasing alignment tolerances in that direction.
    Type: Application
    Filed: June 20, 2006
    Publication date: October 26, 2006
    Inventors: Gurtej Sandhu, Randal Chance, William Rericha
  • Publication number: 20060183025
    Abstract: The invention includes methods of forming reticles. A mask blank is provided having a plurality of regions defined within a main-field area. Exposure to an electron beam is initiated at an initial locus within an interior region of the main-field. The invention includes a method of correcting feature dimension variation. A mask blank is patterned utilizing a first dose correction component and feature dimension variance is determined. The variance is utilized to determine a second correction component which is added to the first dose correction component to create an enhanced dose correction. The invention includes a recording medium and a system comprising the recording medium. The medium contains programming configured to cause processing circuitry to: access data defining a design pattern; obtain error data pertaining to feature dimension variation; generate correction data; produce data defining a corrective pattern; and apply the corrective pattern during an exposure event.
    Type: Application
    Filed: February 14, 2005
    Publication date: August 17, 2006
    Inventors: Baorui Yang, Randal Chance
  • Publication number: 20060063350
    Abstract: The invention includes semiconductor constructions containing vertically-extending pillars, and methods for forming such constructions. The vertically-extending pillars can be incorporated into transistor devices, and can contain vertically-extending channel regions of the transistor devices. The transistor devices can be incorporated into integrated circuitry, and in some aspects are incorporated into memory constructions, such as, for example, dynamic random access memory (DRAM) constructions.
    Type: Application
    Filed: November 14, 2005
    Publication date: March 23, 2006
    Inventors: Randal Chance, Gordon Haller, Sanh Tang, Steven Cummings
  • Publication number: 20060046201
    Abstract: Alignment tolerances between narrow mask lines, for forming interconnects in the array region of an integrated circuit, and wider mask lines, for forming interconnects in the periphery of the integrated circuit, are increased. The narrow mask lines are formed by pitch multiplication and the wider mask lines are formed by photolithography. The wider mask lines and are aligned so that one side of those lines is flush with or inset from a corresponding side of the narrow lines. Being wider, the opposite sides of the wider mask lines protrude beyond the corresponding opposite sides of the narrow mask lines. The wider mask lines are formed in negative photoresist having a height less than the height of the narrow mask lines. Advantageously, the narrow mask lines can prevent expansion of the mask lines in one direction, thus increasing alignment tolerances in that direction.
    Type: Application
    Filed: September 2, 2004
    Publication date: March 2, 2006
    Inventors: Gurtej Sandhu, Randal Chance, William Rericha
  • Publication number: 20060046424
    Abstract: The invention includes semiconductor constructions containing vertically-extending pillars, and methods for forming such constructions. The vertically-extending pillars can be incorporated into transistor devices, and can contain vertically-extending channel regions of the transistor devices. The transistor devices can be incorporated into integrated circuitry, and in some aspects are incorporated into memory constructions, such as, for example, dynamic random access memory (DRAM) constructions.
    Type: Application
    Filed: August 24, 2004
    Publication date: March 2, 2006
    Inventors: Randal Chance, Gordon Haller, Sanh Tang, Steven Cummings
  • Publication number: 20050077266
    Abstract: The invention includes methods of converting reticles from configurations suitable for utilization with later generation (shorter wavelength) stepper radiations to configurations suitable for utilization with earlier generation (longer wavelength) stepper radiations. The invention can be utilized for converting a reticle from a configuration suitable for 193 nanometer wavelength radiation to a configuration suitable for 248 nanometer wavelength radiation. In such aspect, a quartz-containing material of a substrate can be protected with a patterned layer consisting essentially of molybdenum and silicon while the quartz-containing material is subjected to a dry etch.
    Type: Application
    Filed: October 14, 2003
    Publication date: April 14, 2005
    Inventors: Randal Chance, J. Rolfson, Azeddine Zerrade
  • Patent number: 6872509
    Abstract: Photolithographic processing apparatus and methods are disclosed. In one embodiment, a method of photolithographically patterning a surface of a substrate includes forming a photoreactive layer on the surface of the substrate, transmitting light through a first patterning portion of a first photolithographic mask to expose a first patterned portion of the photoreactive layer, transmitting light through a second patterning portion of a second photolithographic mask to expose a second patterned portion of the photoreactive layer. In an alternate embodiment, transmitting light through the first patterning portion of the first photolithographic mask is performed simultaneously with transmitting light through the second patterning portion of the second photolithographic mask. In a further embodiment, the light being transmitted through the second patterning portion of a second photolithographic mask has already been transmitted through a first transparent portion of the first photolithographic mask.
    Type: Grant
    Filed: August 5, 2002
    Date of Patent: March 29, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Kevin Duesman, Randal Chance
  • Publication number: 20040191702
    Abstract: Photolithographic processing apparatus and methods are disclosed. In one embodiment, a method of photolithographically patterning a surface of a substrate includes forming a photoreactive layer on the surface of the substrate, transmitting light through a first patterning portion of a first photolithographic mask to expose a first patterned portion of the photoreactive layer, transmitting light through a second patterning portion of a second photolithographic mask to expose a second patterned portion of the photoreactive layer. In an alternate embodiment, transmitting light through the first patterning portion of the first photolithographic mask is performed simultaneously with transmitting light through the second patterning portion of the second photolithographic mask. In a further embodiment, the light being transmitted through the second patterning portion of a second photolithographic mask has already been transmitted through a first transparent portion of the first photolithographic mask.
    Type: Application
    Filed: April 1, 2004
    Publication date: September 30, 2004
    Inventors: Kevin Duesman, Randal Chance
  • Publication number: 20040023137
    Abstract: Photolithographic processing apparatus and methods are disclosed. In one embodiment, a method of photolithographically patterning a surface of a substrate includes forming a photoreactive layer on the surface of the substrate, transmitting light through a first patterning portion of a first photolithographic mask to expose a first patterned portion of the photoreactive layer, transmitting light through a second patterning portion of a second photolithographic mask to expose a second patterned portion of the photoreactive layer. In an alternate embodiment, transmitting light through the first patterning portion of the first photolithographic mask is performed simultaneously with transmitting light through the second patterning portion of the second photolithographic mask. In a further embodiment, the light being transmitted through the second patterning portion of a second photolithographic mask has already been transmitted through a first transparent portion of the first photolithographic mask.
    Type: Application
    Filed: August 5, 2002
    Publication date: February 5, 2004
    Inventors: Kevin Duesman, Randal Chance