Patents by Inventor Randal D. Roebuck

Randal D. Roebuck has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Non-destructive interconnect system for semiconductor devices
    Patent number: 5571027
    Abstract: An interconnect system (8') for providing electrical connection to bond pads on a semiconductor device (21) includes a socket (12) having a plurality of conductors (46) and a carrier assembly (40) mounted on the socket (12) for carrying a semiconductor device (21). The carrier assembly (40) includes a substrate (17) having a compliant membrane (20b) and a plurality of contact bumps (24) on a top surface of the compliant membrane (20b) for contacting bond pads on the semiconductor device (21) and a force applying mechanism (63). Compliant membrane (20b) is part of a thin film interconnect (20). Contact bumps (24) are connected electrically with conductors (46) by conductive traces (19) and contact pads (18) formed on the thin film interconnect (20). The force applying mechanism (63') applies pressure in making temporary electrical connection between contact bumps (24) and the bond pads of semiconductor device (21).
    Type: Grant
    Filed: October 24, 1995
    Date of Patent: November 5, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Randal D. Roebuck, Salvatore P. Rizzo
  • Non-destructive interconnect system for semiconductor devices
    Patent number: 5468158
    Abstract: An interconnect system (8') for providing electrical connection to bond pads on a semiconductor device (21) includes a socket (12) having a plurality of conductors (46) and a carrier assembly (40) mounted on the socket (12) for carrying a semiconductor device (21). The carrier assembly (40) includes a substrate (17) having a compliant membrane (20b) and a plurality of contact bumps (24) on a top surface of the compliant membrane (20b) for contacting bond pads on the semiconductor device (21) and a force applying mechanism (63). Compliant membrane (20b) is part of a thin film interconnect (20). Contact bumps (24) are connected electrically with conductors (46) by conductive traces (19) and contact pads (18) formed on the thin film interconnect (20). The force applying mechanism (63') applies pressure in making temporary electrical connection between contact bumps (24) and the bond pads of semiconductor device (21).
    Type: Grant
    Filed: January 20, 1995
    Date of Patent: November 21, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Randal D. Roebuck, Salvatore P. Rizzo
  • Non-destructive interconnect system for semiconductor devices
    Patent number: 5468157
    Abstract: An interconnect system (8) for providing electrical connection to bond pads on a semiconductor device (21) includes a socket (12) having a plurality of conductors (46) with retractable contact portions (14) and a carrier assembly (40) mounted on the socket (12) for carrying a semiconductor device (21). The carrier assembly (40) includes a substrate (17) having a compliant membrane (20b), a plurality of contact bumps (24) containing oxide-penetrating particles on a top surface of the compliant membrane (20b) for contacting bond pads on the semiconductor device (21), a fence (30) attached to the top surface of the compliant membrane (20b) for positioning the semiconductor device (21) so that the bond pads on the semiconductor device (21) are aligned with the contact bumps (24). Compliant membrane (20b) is part of a thin film interconnect (20). Contact bumps (24) are connected electrically with conductors (46) by conductive traces (19) and contact pads (18) formed on the thin film interconnect (20).
    Type: Grant
    Filed: October 29, 1993
    Date of Patent: November 21, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Randal D. Roebuck, Fariborz Agahdel, Salvatore P. Rizzo
  • Non-destructive interconnect system for semiconductor devices
    Patent number: 5397245
    Abstract: An interconnect system (8') for providing electrical connection to bond pads on a semiconductor device (21) includes a socket (12) having a plurality of conductors (46) and a carrier assembly (40) mounted on the socket (12) for carrying a semiconductor device (21). The carrier assembly (40) includes a substrate (17) having a compliant membrane (20b) and a plurality of contact bumps (24) on a top surface of the compliant membrane (20b) for contacting bond pads on the semiconductor device (21) and a force applying mechanism (63). Compliant membrane (20b) is part of a thin film interconnect (20). Contact bumps (24) are connected electrically with conductors (46) by conductive traces (19) and contact pads (18) formed on the thin film interconnect (20). The force applying mechanism (63') applies pressure in making temporary electrical connection between contact bumps (24) and the bond pads of semiconductor device (21).
    Type: Grant
    Filed: October 29, 1993
    Date of Patent: March 14, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Randal D. Roebuck, Salvatore P. Rizzo