Patents by Inventor Randall B. Stimson

Randall B. Stimson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10048304
    Abstract: Techniques for configuring a test system that enable simple specification of a degree of concurrency in testing separate functional portions of a semiconductor device. For a test flow with multiple sub-flows, the pins accessed in connection with each sub-flow may define a flow domain. Site regions, each associated with a flow domain, may be defined. Tester sites may be associated with each of these flow domain specific site regions and independently operating resources may be assigned to these tester sites. A second portion of the defined site regions may be associated with tester sites, but resources assigned to these site regions may be accessed from multiple flow domains. Test blocks, even if not developed for concurrent execution, may be executed concurrently using resources in the flow domain specific site regions. Flexibility is provided to share resources through the use of the second portion of the site regions.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: August 14, 2018
    Assignee: Teradyne, Inc.
    Inventors: Jason D. King, Richard Pye, Randall B. Stimson, Steven R. Shirk
  • Publication number: 20130102091
    Abstract: Techniques for configuring a test system that enable simple specification of a degree of concurrency in testing separate functional portions of a semiconductor device. For a test flow with multiple sub-flows; the pins accessed in connection with each sub-flow may define a flow domain. Site regions, each associated with a flow domain, may be defined. Tester sites may be associated with each of these flow domain specific site regions and independently operating resources may be assigned to these tester sites. A second portion of the defined site regions may be associated with tester sites, but resources assigned to these site regions may be accessed from multiple flow domains. Test blocks, even if not developed for concurrent execution, may be executed concurrently using resources in the flow domain specific site regions. Flexibility is provided to share resources through the use of the second portion of the site regions.
    Type: Application
    Filed: October 25, 2011
    Publication date: April 25, 2013
    Applicant: Teradyne, Inc.
    Inventors: Jason D. King, Richard Pye, Randall B. Stimson, Steven R. Shirk
  • Patent number: 7487422
    Abstract: A device is tested using a system that includes automatic test equipment (ATE) and a computer. At the ATE, the testing includes receiving data from the device, and processing the data to obtain processed data. At the computer, the testing includes executing a computer program while the data is being processed at the ATE, where the computer program processes an object that contains a pointer, passing the object to the ATE, and receiving the object from the ATE. The pointer in the object is replaced with the processed data.
    Type: Grant
    Filed: July 19, 2005
    Date of Patent: February 3, 2009
    Assignee: Teradyne, Inc.
    Inventor: Randall B. Stimson
  • Patent number: 7253607
    Abstract: A method for use with automatic test equipment (ATE) having sites, each which accommodates a device under test (DUT), includes defining an object for use with the plural sites, where the object is to contain data associated with at least some of the plural sites, and where the object determines which sites are active. The method also includes using the object during testing of DUTs by the ATE.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: August 7, 2007
    Assignee: Teradyne, Inc.
    Inventors: Stephen J. Hlotyak, Randall B. Stimson, Daniel P. Thornton
  • Patent number: 7171587
    Abstract: An automatic test system, such as might be used to test semiconductor devices as part of their manufacture. The test system uses instruments to generate and measure test signals. The automatic test system has a hardware and software architecture that allows instruments to be added to the test system after it is manufactured. The software is segregated into instrument specific and instrument independent software. Predefined interfaces to the software components allow for easy integration of instruments into the test system and also easy reuse of the software as the physical implementation of the test system or the instruments changes from tester to tester in a product family.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: January 30, 2007
    Assignee: Teradyne, Inc.
    Inventors: Stephen J. Hlotyak, Alan L. Blitz, Randall B. Stimson
  • Publication number: 20040215361
    Abstract: An automatic test system, such as might be used to test semiconductor devices as part of their manufacture. The test system uses instruments to generate and measure test signals. The automatic test system has a hardware and software architecture that allows instruments to be added to the test system after it is manufactured. The software is segregated into instrument specific and instrument independent software. Predefined interfaces to the software components allow for easy integration of instruments into the test system and also easy reuse of the software as the physical implementation of the test system or the instruments changes from tester to tester in a product family.
    Type: Application
    Filed: June 12, 2003
    Publication date: October 28, 2004
    Inventors: Stephen J. Hlotyak, Alan L. Blitz, Randall B. Stimson