Patents by Inventor Randall E. Lehmann

Randall E. Lehmann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5047829
    Abstract: Monolithic gallium arsenide limiters (30) formed of p-i-n diodes (32, 34) that are distributed devices between conductors of coplanar waveguide sections (40, 42, 44) are disclosed. The diode doped regions underlie the coplanar conductors and the diode intrinsic region underlies the coplanar waveguide gap. The grounded coplanar segments connect to a backside ground through vias (74).
    Type: Grant
    Filed: October 30, 1986
    Date of Patent: September 10, 1991
    Assignee: Texas Instruments Incorporated
    Inventors: David J. Seymour, David D. Heston, Randall E. Lehmann
  • Patent number: 4810980
    Abstract: This invention provides a switched limiter with variable attenuation designed with monolithic GaAs p-i-n diodes. Greater than 30 dB of small-signal variable attenuation is achieved at X band frequencies, with a minimum insertion loss of 0.5 dB. The variable attenuation switched limiter provides 15 dB of isolation to a +30 dBm input signal. Under bias conditions that result in variable attenuation the variable attenuation switched limiter input impedance remains matched. When used as a passive limiter, 7 dB of limiting has been achieved for a +30 dBm input signal at 10 GHz.
    Type: Grant
    Filed: June 4, 1987
    Date of Patent: March 7, 1989
    Assignee: Texas Instruments, Inc.
    Inventors: David D. Heston, David J. Seymour, Randall E. Lehmann
  • Patent number: 4658220
    Abstract: A monolithic low noise variable gain amplifier with series feedback includes a dual gate field effect transistor (DGFET) having a common source FET and a common gate FET with scaled gate widths and/or an interelectrode matching element connected to ground through a capacitor positioned between the two gates for reducing the minimum noise figure of the common gate FET and establishing the output load for the common source FET, and an inductive series feedback line for connecting the common source FET to ground. The amount of series feedback between the source and ground of the DGFET as well as the appropriate output load obtained through gate width scaling are selected to make the conjugate input impedance equal to the optimum impedance for a simultaneous noise match and power match.
    Type: Grant
    Filed: September 6, 1985
    Date of Patent: April 14, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: David D. Heston, Randall E. Lehmann, David J. Seymour
  • Patent number: 4614915
    Abstract: A monolithic low noise amplifier is provided having at least one stage. Said stage including a Field Effect Transistor (FET) and an inductive series feedback element comprising a transmission line having an end connected to the FET source and an end connected to ground. A load matching network is attached to the FET drain to provide simultaneous noise match and power match.
    Type: Grant
    Filed: January 14, 1985
    Date of Patent: September 30, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: David D. Heston, Randall E. Lehmann
  • Patent number: 4549197
    Abstract: In order to provide low and exactly repeatable common lead inductance (gate lead inductance) and low feedback parasitics in a common-gate low noise amplifier, a GaAs FET connects the gate electrode to ground at various points along its width by means of an air bridge crossover structure. This structure crosses over the input (source) lines with very low capacitance. Since the gate lead inductance is low in this design, and because in monolithic form this inductance does not vary as is the case for a device grounded using bond wires, common-gate circuit stability is assured. This device preferably uses the well-known pi-gate configuration to provide low drain-gate parasitic capacitance and equal phasing to all parts of the device.
    Type: Grant
    Filed: July 6, 1982
    Date of Patent: October 22, 1985
    Assignee: Texas Instruments Incorporated
    Inventors: Gailon E. Brehm, Randall E. Lehmann
  • Patent number: 4525678
    Abstract: A monolithic amplifier having a common-gate input stage with a device transconductance which is higher than required for input match, and a load impedance presented to the common-gate stage which is not conjugate matched. The present invention teaches a common-gate configuration using an FET with higher transconductance and a higher output load impedance. Over narrower bandwidths, excellent input match is thus obtained with noise figures at least as good as those obtained with the common-source approach. This combination of noise figure and input match is achieved in a compact monolithic structure.
    Type: Grant
    Filed: July 6, 1982
    Date of Patent: June 25, 1985
    Assignee: Texas Instruments Incorporated
    Inventors: Randall E. Lehmann, Gailon E. Brehm, David J. Seymour