Abstract: A robotic system includes a plurality of robotic elements, each having at least one processing component, at least one memory component, and an I/O interface; and a virtual backplane coupling the plurality of robotic elements.

Abstract: An adaptive multi-channel architecture for a wireless network is provided. A frequency hopping sequence generator module is compliant with a frequency hopping spread spectrum (FHSS) communications protocol. The frequency hopping sequence generator module is capable of performing FHSS concurrently on a plurality of communications channels. A frequency replacement module is coupled to the frequency hopping sequence generator module. The frequency replacement module is configured to receive feedback data over a feedback channel and adaptively select a transmission channel from the plurality of communications channels using the feedback data.

Abstract: An adaptive multi-channel architecture for a wireless network is provided. A frequency hopping sequence generator module is compliant with a frequency hopping spread spectrum (FHSS) communications protocol. The frequency hopping sequence generator module is capable of performing FHSS concurrently on a plurality of communications channels. A frequency replacement module is coupled to the frequency hopping sequence generator module. The frequency replacement module is configured to receive feedback data over a feedback channel and adaptively select a transmission channel from the plurality of communications channels using the feedback data.

Abstract: Systems and methods are provided for controlling one or more actuators to perform a mission while complying with predetermined regulations. A system for controlling one or more actuators includes a first processor for transmitting a command to operate at least one of the actuators, a second processor having an input coupled to the first processor, and a third processor having an input coupled to the output of the second processor and an output configured to couple to the actuators. The second processor is configured to transmit a first signal based on the command, and the first signal indicates a compliant command. The third processor is configured to transmit a second signal based on the first signal, and the second signal indicates a safe command. Software partitions executing on a single processor may be substituted for the hardware processors.

Abstract: A communication network comprises a communication bus and at least two line cards. Each of the line cards are coupled to the communication bus The line cards comprise a processor and a configuration memory coupled to the processor. The communication occurring on the communication bus is predetermined, but can be reconfigured during real time operation by events or by the addition or subtraction of line cards. The configuration memory comprising an array of configuration tables, each configuration table storing a listing of processes to run and data to be transmitted or received by the process. A current configuration table is selected from the array of configuration tables upon the occurrence of a predefined event.

Abstract: A robotic system includes a plurality of robotic elements, each having at least one processing component, at least one memory component, and an I/O interface; and a virtual backplane coupling the plurality of robotic elements.

Abstract: Method and apparatus are provided for preventing faulty commercial-off-the-shelf (COTS) peripherals or I/Os from disabling the bus to which they are connected. The apparatus has isolators coupled to the bus and the I/Os. A controller is coupled between the interfaces, a processor and memory, operating such that an I/O cannot transfer data to the bus without permission from the bus. Isolation memory keeps I/O and bus messages separate. I/O messages are checked before being sent to the bus. The method comprises: determining if there is a message for the peripheral, temporarily storing the message, determining if the message is for output or input, and if for output, sending it to the peripheral, and if for input, requesting and receiving it from the peripheral, temporarily storing and checking it, and transferring it to the bus only if valid. This prevents a failed I/O or peripheral from disabling the bus.