Abstract: A method and structure to adhesively couple a cover plate to a semiconductor device. A semiconductor device is electrically coupled to a substrate. A stiffener ring surrounding the semiconductor device is adhesively coupled to the substrate. A cover plate is adhesively coupled to both a top surface of the semiconductor device and a top surface of the stiffener ring using a first and second adhesive, respectively. The modulus of the first adhesive is less than the modulus of the second adhesive.

Abstract: An electrical structure or package, and associated method of formation. A plurality of logic chips is coupled electrically to a memory chip either through conductive members (e.g., solder balls) that interface with the memory chip and each logic chip, or through a sequential logic-to-memory electrically conductive path that includes: a first conductive member electrically coupled to a logic chip; an electrically conductive via path through a circuitized substrate; and a second conductive member electrically coupled to the memory chip. The logic chips are electrically coupled to the substrate either directly through an interfacing solder interconnection from the logic chip to the substrate, or indirectly through the memory chip such that the memory chip is electrically coupled to the substrate by an interfacing solder interconnect. The electrical structure may be plugged into a socket of a backplane of a circuit card.

Abstract: A stress-relieving heatsink structure and method of forming thereof for an electronic package, for instance, that including a semiconductor chip package which is mounted on a wired carrier, such as a circuitized substrate. The heatsink structure is constituted from a plurality of base structures which are joined along slits so as to impart a degree of flexibility to the electronic package inhibiting the forming of stresses tending to cause delamination of the package components.

Abstract: A stress-relieving heatsink structure and method of forming thereof for an electronic package, for instance, that including a semiconductor chip package which is mounted on a wired carrier, such as a circuitized substrate. The heatsink structure is constituted from a plurality of base structures which are joined along slits so as to impart a degree of flexibility to the electronic package inhibiting the forming of stresses tending to cause delamination of the package components.

Abstract: A stress-relieving heatsink structure and method of forming thereof for an electronic package, for instance, that including a semiconductor chip package which is mounted on a wired carrier, such as a circuitized substrate. The heatsink structure is constituted from a plurality of base structures which are joined along slits so as to impart a degree of flexibility to the electronic package inhibiting the forming of stresses tending to cause delamination of the package components.

Abstract: A multi-layer printed circuit board including at least one layer of an electrically conducting material and at least one layer of an electrically insulating material. At least one through hole formed at least through the at least one layer of electrically conducting material. The at least one through hole includes a material plated on an interior surface thereof. At least one thermal break is provided in the at least one layer of electrically conducting material, such that heat passing between the through hole and the at least one layer of electrically conducting material passes through the at least one thermal break. At least one electrical connection provided in the at least one layer of electrically conducting material between the material plated on the interior surface of the through hole and the at least one layer of electrically conducting material. At least a portion of the at least one electrical connection is between the through hole and the at least one thermal break.

Abstract: A printed circuit board is provided comprising a substrate, a conductor on the surface of the substrate, and an electronic component mounted on the conductor. The printed circuit board includes a first thermally conductive layer within the substrate and a second thermally conductive layer on a portion of the surface of the substrate and spaced from the electronic component. The electronic component is thermally coupled to the second thermally conductive layer by a thermally conductive aperture positioned within the substrate and connected to the conductor and the first thermally conductive layer. The first thermally conductive layer is connected to the second thermally conductive layer by a plurality of apertures also positioned in the substrate. Another printed circuit board is also provided comprising a first plurality of laminate dielectric layers, a conductor on a surface of the first plurality of laminated dielectric layers, and an electronic component mounted on the conductor.

Abstract: A hermetic electronic assembly incorporating cryogenically-cooled and air-cooled elements in an integrated assembly. A hermetic cryogenically-cooled enclosure is disposed in close physical proximity to one or more air-cooled circuit cards to minimize physical separation, thereby optimizing signal bandwidth and noise immunity. The air-cooled circuit cards, which generate substantial heat but do not require low operating temperatures, are thermally decoupled from the cryogenically-cooled elements to optimize cryo-cooler efficiency by reserving cooling capacity for the temperature-sensitive processor elements mounted within an evacuated hermetic enclosure. Thus, thermal isolation and physical/electrical proximity are preserved in the same package.

Abstract: An electronic package which includes at least two flexible circuitized substrates (e.g., thin film elements) connected at one location to a common first circuitized substrate (e.g., printed circuit board) and at another location to a semiconductor device, these subassemblies being located within a base member of the package. In one embodiment, a singular heat sink member is thermally coupled to a respective one of the semiconductor devices, and a common, second heat sink member is thermally coupled to all of the first heat sink members. This common heat sink member also uniquely serves as a stiffener for the package. In another embodiment, a common heat sink member is securedly positioned on the opposite side of a first circuitized substrate from the plurality of flexible circuitized substrates and semiconductor devices. A base member is also used as part of this package. As in the aforementioned other embodiment, the common heat sink member also serves as a stiffener.