Abstract: A method for providing an indication from a network interface controller to a microcontroller is disclosed wherein upon occurrence of a particular condition within the network interface controller, an indication is provided from a reset pin of the network interface controller to the microcontroller unit. Upon receipt of the indication by the microcontroller unit, communications between the network interface controller and the microcontroller unit are inhibited.

Abstract: A parallel to USB bridge controller includes a USB transceiver for transmitting and receiving on a USB link and a serial interface engine connected to the USB link for converting between USB protocol and serial interface protocol. A memory interface within the controller includes a transmit data register for receiving data from a parallel data link and a receive register for receiving data to be transmitted over the parallel data link. The transmit data register and the receive data register of the memory interface are located within the memory space of a processor connected to the USB serial interface. The memory interface is able to send and receive data between the transmit and receive data registers and an external processor over the parallel data link.

Abstract: A method for providing an indication from a network interface controller to a microcontroller is disclosed wherein upon occurrence of a particular condition within the network interface controller, an indication is provided from a reset pin of the network interface controller to the microcontroller unit. Upon receipt of the indication by the microcontroller unit, communications between the network interface controller and the microcontroller unit are inhibited.

Abstract: A single chip network controller for interfacing between a physical network and a processing system on the media side of the network controller. The network controller includes a physical layer for receiving data for transmission to the network and encoding the received data for transmission thereto and for receiving data from the network, and for receiving data from the network and decoding the received data. A media layer is provided for interfacing with the processing system for receiving data from the processing system for interface with the physical layer for encoding and transmission thereof and for receiving decoded data from the physical layer and providing access thereto by the processing system. An on-chip non-volatile memory is provided having a first portion associated with configuration information for configuring the operation of the physical layer and the media layer, and a second portion thereof that is accessible by the processing system on the media side of the network controller.