Abstract: A zero voltage switching synchronous rectification circuit for providing multiple output voltages from a single input voltage is disclosed. The circuit comprises a single transformer coupled to the single input voltage and at least two synchronous rectifiers, each of the at least two synchronous rectifiers being coupled to the transformer via a winding, each of the at least two synchronous rectifiers including a first controlled switching device coupled to the winding, wherein at least one of the at least two synchronous rectifiers includes a delay element, the delay element being coupled to the winding via the first controlled switching device, wherein the delay element delays the input voltage across the at least one of the at least two synchronous rectifiers for a predetermined amount of time. By incorporating a delay element with a plurality of isolated synchronous rectifiers, Zero Voltage Switching is achieved in a multiple output environment.

Abstract: A zero voltage switching synchronous rectification circuit for providing multiple output voltages from a single input voltage is disclosed. The circuit comprises a single transformer coupled to the single input voltage and at least two synchronous rectifiers, each of the at least two synchronous rectifiers being coupled to the transformer via a winding, each of the at least two synchronous rectifiers including a first controlled switching device coupled to the winding, wherein at least one of the at least two synchronous rectifiers includes a delay element, the delay element being coupled to the winding via the first controlled switching device, wherein the delay element delays the input voltage across the at least one of the at least two synchronous rectifiers for a predetermined amount of time. By incorporating a delay element with a plurality of isolated synchronous rectifiers, Zero Voltage Switching is achieved in a multiple output environment.

Abstract: An inductor or transformer uses a multilayer printed circuit board to form the conductor turns. Each layer comprises a dielectric sheet and a conductor printed on the sheet. Each of the conductors has approximately the same shape as each other (such as circular or rectangular), is superimposed on the other conductors and is substantially closed on itself (with a gap to separate the two ends). A multiplicity of through-hole vias are evenly spaced around the conductors and pass through the multiplicity of layers. Successive vias make an electrical connection between successive pairs of adjacent conductors such that current passes in the same direction through all of the conductors. Each layer provides (N-1)/N turns such that N layers provide N-1 complete turns. A ferrite core material passes through a hole in the printed circuit board within the conductors.

Abstract: A three phase input, boost power supply comprises first, second and third rectifiers for respective phases of the three phase input. First, second and third boost inductors are interposed between the first, second and third rectifiers, respectively and respective phases of said three phase input. A low pass filter is interposed between the boost inductors and the three phase input. A chopping switch is connected to an output of at least one of the rectifiers in parallel with a load to boost a voltage of the load. A current sensor is connected between the rectifier output and the load. The switch is activated in response to the current sensor sensing approximately zero current flow. The subsequent rate of current rise is proportional to the magnitude of the input voltage. The switch is deactivated based in part on a comparison of the load voltage to a reference voltage. Thus, the input current for each phase has nearly unity power factor, even when one phase drops out.

Abstract: A power converter comprises a first printed circuit board containing some of the circuitry of the power converter, a header comprising a support structure and a multiplicity of metallic pins passing through the support structure, and an inductor mounted to the support structure and including wires connected to respective pins. Portions of the pins on one side of the support structure are mounted to the first printed circuit board to support the header in fixed offset relation to the first printed circuit board. Portions of the pins on an opposite other side of the support structure are adapted to mount to a second, mother board to support the header in fixed offset relation to the mother board.