Patents by Inventor Randolph Cruz
Randolph Cruz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11150710Abstract: One embodiment is directed towards an encapsulated device. The encapsulated device includes a device, and a first encapsulation covering the device. The first encapsulation has one or more exterior surfaces. One or more recesses in one or more of the exterior surfaces is configured to receive a second encapsulation.Type: GrantFiled: June 7, 2019Date of Patent: October 19, 2021Assignee: Intersil Americas LLCInventors: Randolph Cruz, Loyde M. Carpenter, Jr., Mark A. Kwoka
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Patent number: 10528104Abstract: One embodiment is directed towards a molded insulator substrate. The molded insulator substrate includes a first insulator having a first surface and a second surface. A recess in said first surface of the first insulator is configured to facilitate venting of a second insulator over exposed regions of the first surface. A first conductive terminal is exposed through the first surface. A second conductive terminal is exposed through the second surface and electrically coupled to the first terminal.Type: GrantFiled: January 4, 2019Date of Patent: January 7, 2020Assignee: Intersil Americas LLCInventor: Randolph Cruz
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Publication number: 20190294225Abstract: One embodiment is directed towards an encapsulated device. The encapsulated device includes a device, and a first encapsulation covering the device. The first encapsulation has one or more exterior surfaces. One or more recesses in one or more of the exterior surfaces is configured to receive a second encapsulation.Type: ApplicationFiled: June 7, 2019Publication date: September 26, 2019Applicant: Intersil Americas LLCInventors: Randolph Cruz, Loyde M. Carpenter, Mark A. Kwoka
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Patent number: 10317965Abstract: One embodiment is directed towards an encapsulated device. The encapsulated device includes a device, and a first encapsulation covering the device. The first encapsulation has one or more exterior surfaces. One or more recesses in one or more of the exterior surfaces is configured to receive a second encapsulation.Type: GrantFiled: February 17, 2016Date of Patent: June 11, 2019Assignee: INTERSIL AMERICAS LLCInventors: Randolph Cruz, Loyde M. Carpenter, Jr., Mark A. Kwoka
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Patent number: 10290564Abstract: Systems and methods for lead frame locking design features are provided. In one embodiment, a method comprises: fabricating a lead frame for a chip package, the lead frame having a paddle comprising a step-out bottom locking feature profile across at least a first segment of an edge of the paddle that provides an interface with a mold compound; etching the paddle to have at least a second segment of the edge having either an extended-step-out bottom locking feature profile or an overhanging top locking feature profile; and alternating first and second segments along the edge of the paddle.Type: GrantFiled: August 3, 2017Date of Patent: May 14, 2019Assignee: Intersil Americas LLCInventor: Randolph Cruz
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Publication number: 20190138070Abstract: One embodiment is directed towards a molded insulator substrate. The molded insulator substrate includes a first insulator having a first surface and a second surface. A recess in said first surface of the first insulator is configured to facilitate venting of a second insulator over exposed regions of the first surface. A first conductive terminal is exposed through the first surface. A second conductive terminal is exposed through the second surface and electrically coupled to the first terminal.Type: ApplicationFiled: January 4, 2019Publication date: May 9, 2019Inventor: Randolph CRUZ
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Patent number: 10175733Abstract: One embodiment is directed towards a molded insulator substrate. The molded insulator substrate includes a first insulator having a first surface and a second surface. A recess in said first surface of the first insulator is configured to facilitate venting of a second insulator over exposed regions of the first surface. A first conductive terminal is exposed through the first surface. A second conductive terminal is exposed through the second surface and electrically coupled to the first terminal.Type: GrantFiled: February 17, 2016Date of Patent: January 8, 2019Assignee: INTERSIL AMERICAS LLCInventor: Randolph Cruz
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Publication number: 20170330823Abstract: Systems and methods for lead frame locking design features are provided. In one embodiment, a method comprises: fabricating a lead frame for a chip package, the lead frame having a paddle comprising a step-out bottom locking feature profile across at least a first segment of an edge of the paddle that provides an interface with a mold compound; etching the paddle to have at least a second segment of the edge having either an extended-step-out bottom locking feature profile or an overhanging top locking feature profile; and alternating first and second segments along the edge of the paddle.Type: ApplicationFiled: August 3, 2017Publication date: November 16, 2017Applicant: Intersil Americas LLCInventor: Randolph CRUZ
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Patent number: 9728491Abstract: Systems and methods for lead frame locking design features are provided. In one embodiment, a method comprises: fabricating a lead frame for a chip package, the lead frame having a paddle comprising a step-out bottom locking feature profile across at least a first segment of an edge of the paddle that provides an interface with a mold compound; etching the paddle to have at least a second segment of the edge having either an extended-step-out bottom locking feature profile or an overhanging top locking feature profile; and alternating first and second segments along the edge of the paddle.Type: GrantFiled: August 18, 2015Date of Patent: August 8, 2017Assignee: INTERSIL AMERICAS LLCInventor: Randolph Cruz
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Patent number: 9627297Abstract: Embodiments described herein relate to a packaged component including a lead frame and a non-conductive plug disposed between two or more adjacent sections of the lead frame. The plug is composed of a non-conductive material functions to impede the flow of solder along edges of the two or more adjacent sections during second level solder reflow events that occur after encapsulation of the packaged component. The plug includes a main portion disposed within a space between the two or more adjacent sections, and one or more overlap portions extending from the main portion. The one or more overlap portions are disposed on an internal surface of at least one of the two or more adjacent sections. At least one component is mounted on one of the plurality of sections of the lead frame.Type: GrantFiled: October 30, 2015Date of Patent: April 18, 2017Assignee: Intersil Americas LLCInventors: Randolph Cruz, Loyde Milton Carpenter, Jr.
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Publication number: 20170077807Abstract: One embodiment is directed towards an encapsulated device. The encapsulated device includes a device, and a first encapsulation covering the device. The first encapsulation has one or more exterior surfaces. One or more recesses in one or more of the exterior surfaces is configured to receive a second encapsulation.Type: ApplicationFiled: February 17, 2016Publication date: March 16, 2017Inventors: Randolph Cruz, Loyde M. Carpenter, JR., Mark A. Kwoka
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Publication number: 20170020028Abstract: One embodiment is directed towards a molded insulator substrate. The molded insulator substrate includes a first insulator having a first surface and a second surface. A recess in said first surface of the first insulator is configured to facilitate venting of a second insulator over exposed regions of the first surface. A first conductive terminal is exposed through the first surface. A second conductive terminal is exposed through the second surface and electrically coupled to the first terminal.Type: ApplicationFiled: February 17, 2016Publication date: January 19, 2017Inventor: Randolph Cruz
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Patent number: 9536852Abstract: Embodiments described herein relate to a packaged circuit including a lead frame having at least one recess pattern on an internal surface thereof. The at least one recess pattern includes a perimeter recess that defines a perimeter around one or more raised surfaces. The packaged circuit also includes a component having one or more terminals. One of the terminals is mounted to the one or more raised surfaces such that the terminal covers the perimeter recess, wherein the perimeter recess has a size and shape such that the recess is proximate a perimeter of the terminal. The packaged circuit also includes component attach adhesive between the single terminal of the component and the one or more raised surfaces of the lead frame.Type: GrantFiled: October 1, 2014Date of Patent: January 3, 2017Assignee: Intersil Americas LLCInventors: Randolph Cruz, Loyde Milton Carpenter, Jr.
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Publication number: 20160056093Abstract: Embodiments described herein relate to a packaged component including a lead frame and a non-conductive plug disposed between two or more adjacent sections of the lead frame. The plug is composed of a non-conductive material functions to impede the flow of solder along edges of the two or more adjacent sections during second level solder reflow events that occur after encapsulation of the packaged component. The plug includes a main portion disposed within a space between the two or more adjacent sections, and one or more overlap portions extending from the main portion. The one or more overlap portions are disposed on an internal surface of at least one of the two or more adjacent sections. At least one component is mounted on one of the plurality of sections of the lead frame.Type: ApplicationFiled: October 30, 2015Publication date: February 25, 2016Inventors: Randolph Cruz, Loyde Milton Carpenter, JR.
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Publication number: 20150357265Abstract: Systems and methods for lead frame locking design features are provided. In one embodiment, a method comprises: fabricating a lead frame for a chip package, the lead frame having a paddle comprising a step-out bottom locking feature profile across at least a first segment of an edge of the paddle that provides an interface with a mold compound; etching the paddle to have at least a second segment of the edge having either an extended-step-out bottom locking feature profile or an overhanging top locking feature profile; and alternating first and second segments along the edge of the paddle.Type: ApplicationFiled: August 18, 2015Publication date: December 10, 2015Inventor: Randolph Cruz
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Patent number: 9177896Abstract: Embodiments described herein relate to a packaged component including a lead frame and a non-conductive plug disposed between two or more adjacent sections of the lead frame. The plug is composed of a non-conductive material and is adhered to the two or more adjacent sections of the lead frame. The plug functions to impede the flow of solder along edges of the two or more adjacent sections during second level solder reflow events that occur after encapsulation of the packaged component. The plug includes a main portion disposed within a space between the two or more adjacent sections, and one or more overlap portions extending from the main portion. The one or more overlap portions are disposed on an internal surface of at least one of the two or more adjacent sections. At least one component is mounted on one of the plurality of sections of the lead frame.Type: GrantFiled: January 22, 2015Date of Patent: November 3, 2015Assignee: Intersil Americas LLCInventors: Randolph Cruz, Loyde Milton Carpenter, Jr.
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Patent number: 9165863Abstract: Systems and methods for lead frame locking design features are provided. In one embodiment, a method comprises: fabricating a lead frame for a chip package, the lead frame having a paddle comprising a step-out bottom locking feature profile across at least a first segment of an edge of the paddle that provides an interface with a mold compound; etching the paddle to have at least a second segment of the edge having either an extended-step-out bottom locking feature profile or an overhanging top locking feature profile; and alternating first and second segments along the edge of the paddle.Type: GrantFiled: July 1, 2013Date of Patent: October 20, 2015Assignee: Intersil Americas LLCInventor: Randolph Cruz
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Publication number: 20150130038Abstract: Embodiments described herein relate to a packaged component including a lead frame and a non-conductive plug disposed between two or more adjacent sections of the lead frame. The plug is composed of a non-conductive material and is adhered to the two or more adjacent sections of the lead frame. The plug functions to impede the flow of solder along edges of the two or more adjacent sections during second level solder reflow events that occur after encapsulation of the packaged component. The plug includes a main portion disposed within a space between the two or more adjacent sections, and one or more overlap portions extending from the main portion. The one or more overlap portions are disposed on an internal surface of at least one of the two or more adjacent sections. At least one component is mounted on one of the plurality of sections of the lead frame.Type: ApplicationFiled: January 22, 2015Publication date: May 14, 2015Inventors: Randolph Cruz, Loyde Milton Carpenter, JR.
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Patent number: 9018746Abstract: One embodiment is directed towards a packaged chip including a lead frame. At least one chip is mounted on the lead frame. At least one edge the lead frame has a solder flow impeding feature located thereon. The solder flow impeding feature includes an integral portion of the lead frame that extends in a first projection outward at an edge of the lead frame and parallel to an external surface of the lead frame. An internal surface of the first projection is aligned with an internal surface of the main portion of the lead frame. The solder flow impeding feature also includes a second projection that extends from an external side of the first projection in a direction generally perpendicular to the first projection.Type: GrantFiled: October 1, 2014Date of Patent: April 28, 2015Assignee: Intersil Americas LLCInventors: Randolph Cruz, Loyde Milton Carpenter, Jr.
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Patent number: 8969137Abstract: Embodiments described herein relate to a method of manufacturing a packaged circuit having a solder flow-impeding plug on a lead frame. The method includes partially etching an internal surface of a lead frame at dividing lines between future sections of the lead frame as first partial etch forming a trench. A non-conductive material that is adhesive to the lead frame is applied in the trench, such that the non-conductive material extends across the trench to form the solder flow-impeding plug. One or more components are attached to the internal surface of the lead frame and encapsulated. An external surface of the lead frame is etched at the dividing lines to disconnect different sections of lead frame as a second partial etch.Type: GrantFiled: December 17, 2012Date of Patent: March 3, 2015Assignee: Intersil Americas LLCInventors: Randolph Cruz, Loyde M. Carpenter, Jr.