Patents by Inventor Randolph Wayne Zoch

Randolph Wayne Zoch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD AND SYSTEM FOR TEST VERIFICATION OF INTEGRATED CIRCUIT DESIGNS
    Publication number: 20080115028
    Abstract: A method and system for verifying the design of an integrated circuit including an analog portion and a digital portion are disclosed. As one example, a method for verifying the design of an integrated circuit is disclosed, which includes the steps of generating an analog stimulus, performing a simulation test of the analog portion of the integrated circuit using the analog stimulus as an input, collecting data at an output of the analog portion of the integrated circuit, generating a digital stimulus with the collected data, performing a simulation test of the digital portion of the integrated circuit using the digital stimulus as an input, validating data at an output of the digital portion of the integrated circuit, regression testing the digital portion of the integrated circuit using the digital stimulus as an input, and comparing a result of the regression testing step with a result of the validating data step.
    Type: Application
    Filed: October 23, 2006
    Publication date: May 15, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Johnny Thurman Homer, William Milton Hurley, Randolph Wayne Zoch