Abstract: A phase locked loop (PLL) circuit includes a phase comparator that compares the phases of an input signal and a feedback signal and generates UP and DOWN pulses that are related to the phase difference. A charge pump receives the UP and DOWN pulses from the phase comparator and either charges or discharges the tuning voltage of a loop filter. The voltage controlled oscillator (VCO) provides an output signal that has a frequency that is related to the tuning voltage. A frequency divider then divides the frequency of the VCO output by a factor of N and provides the output as the feedback signal to the phase comparator. The PLL includes pre-lock circuitry that responds to an active state of a pre-lock input signal by narrowing the dynamic range of the VCO to a pre-lock range that is centered around a predetermined final frequency and that deactivates upon achieving the pre-lock range.