Patents by Inventor Randy Bonella

Randy Bonella has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070136523
    Abstract: A memory module including a volatile memory, a non-volatile memory, and a controller that provides address, data, and control interfaces to the memories and to a host system, such as, for example, a personal computer, is operable to interact with the host system so as to provide one or more additional layers in the memory hierarchy of the host system. In one aspect of the present invention the controller operates the volatile memory of the memory module as a cache for the non-volatile memory of the memory module. In another aspect of the present invention data representing one or more software applications and/or one or more data sets are stored in the non-volatile memory of the memory module along with security information such that a host system may quickly launch applications from the memory module rather than from a slower hard disk drive.
    Type: Application
    Filed: December 8, 2006
    Publication date: June 14, 2007
    Inventors: Randy Bonella, Chung Lam
  • Publication number: 20070079065
    Abstract: Memory modules address the growing gap between main memory performance and disk drive performance in computational apparatus such as personal computers. Memory modules disclosed herein fill the need for substantially higher storage capacity in end-user add-in memory modules. Such memory modules accelerate the availability of applications, and data for those applications. An exemplary application of such memory modules is as a high capacity consumer memory product that can be used in Hi-Definition video recorders. In various embodiments, memory modules include a volatile memory, a non-volatile memory, and a command interpreter that includes interfaces to the memories and to various busses. The first memory acts as an accelerating buffer for the second memory, and the second memory provides non-volatile backup for the first memory. In some embodiments data transfer from the first memory to the second memory may be interrupted to provide read access to the second memory.
    Type: Application
    Filed: June 13, 2006
    Publication date: April 5, 2007
    Inventors: Randy Bonella, Chung Lam
  • Patent number: 6587912
    Abstract: A computer system memory module includes a bi-directional repeater hub that in a first direction takes as an input a memory bus signal in a first port, regenerates the memory signals, and outputs the regenerated memory signal at a second port as at least one separate signal for coupling to a memory bus for each of the regenerated separate signals. In a second direction, the bi-directional repeater hub takes as input at least one memory bus signal at the second port, regenerates each input memory bus signal, and outputs the regenerated memory signal at the first port for coupling to a memory bus.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: July 1, 2003
    Assignee: Intel Corporation
    Inventors: Michael W. Leddige, Bryce D. Horine, Randy Bonella, Peter D. MacWilliams
  • Patent number: 6477614
    Abstract: A computer system memory module includes a bi-directional repeater hub that in a first direction takes as an input a memory bus signal in a first port, regenerates the memory signals, and outputs the regenerated memory signal at a second port as at least one separate signal for coupling to a memory bus for each of the regenerated separate signals. In a second direction, the bi-directional repeater hub takes as input at least one memory bus signal at the second port, regenerates each input memory bus signal, and outputs the regenerated memory signal at the first port for coupling to a memory bus. A method includes determining whether a memory device to which signals are addressed is on a first memory module. Signals are routed to a first memory bus on the first memory module connected to the memory device if the memory is on the first memory module. Signals are routed to a second memory bus on a second memory module if the memory device is not on the first memory module.
    Type: Grant
    Filed: September 8, 2000
    Date of Patent: November 5, 2002
    Assignee: Intel Corporation
    Inventors: Michael W. Leddige, Bryce D. Horine, Randy Bonella, Peter D. MacWilliams
  • Patent number: 6369605
    Abstract: An output driver circuit within an electronic device to provide a configurable driver circuit. When placed in a first mode of operation, the driver circuit drives an output signal. When placed in a second mode of operation, the driver circuit provides impedance matching to prevent signal reflection.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: April 9, 2002
    Assignee: Intel Corporation
    Inventors: Randy Bonella, John Halbert
  • Publication number: 20020038405
    Abstract: A memory module includes a first memory bus. A memory repeater hub is coupled to the first memory bus. A second memory bus is coupled in series with the memory repeater hub.
    Type: Application
    Filed: September 30, 1998
    Publication date: March 28, 2002
    Inventors: MICHAEL W. LEDDIGE, BRYCE D. HORINE, RANDY BONELLA, PETER D. MACWILLIAMS