Abstract: A polishing apparatus of a semiconductor wafer by a chemical-mechanical polishing method including a polishing platen having an upper surface on which a polishing pad is attached. The polishing platen is rotated in one direction along a central axis. A plurality of coaxial polishing-dressing head assemblies each having a lower surface opposed to an upper surface of the polishing pad on the polishing platen. Each of the coaxial assemblies holds a wafer to be polished while rotating along a central axis and pressing the rotating wafers on a radial portion of the rotating polishing pad. A polishing pad dressing ring is mounted coaxially encircling each of the wafer supporting heads. The applied compression on the wafer supporting heads pushes the wafer and the coaxially mounted dressing ring against the upper surface of the polishing pad therefore polishing each wafer while dressing the polishing pad.

Abstract: A polishing apparatus of a semiconductor wafer by a chemical-mechanical polishing method including a polishing platen having an upper surface on which a polishing pad is attached. The polishing platen is rotated in one direction along a central axis. A plurality of coaxial polishing-dressing head assemblies each having a lower surface opposed to an upper surface of the polishing pad on the polishing platen. Each of the coaxial assemblies holds a wafer to be polished while rotating along a central axis and pressing the rotating wafers on a radial portion of the rotating polishing pad. A polishing pad dressing ring is mounted coaxially encircling each of the wafer supporting heads. The applied compression on the wafer supporting heads pushes the wafer and the coaxially mounted dressing ring against the upper surface of the polishing pad therefore polishing each wafer while dressing the polishing pad.

Abstract: A method for forming a low resistance metal/polysilicon gate for use in CMOS devices comprising: (1) a novel anneal step prior to formation of a diffusion barrier layer and (2) a novel diffusion barrier layer composed of titanium nitride deposited over titanium silicide or titanium nitride deposited directly on the polysilicon. A first insulating layer is formed over a silicon substrate, and a polysilicon layer is formed over the first insulating layer. In a key step, the polysilicon layer is annealed to prevent peeling of the subsequently formed diffusion barrier layer. A diffusion barrier layer comprising titanium nitride deposited over titanium silicide or titanium nitride deposited directly on the polysilicon is formed over the polysilicon layer. A tungsten layer is formed over the diffusion barrier layer, and a capping layer comprising a silicon nitride layer over an oxide layer can be formed over the tungsten layer.

Abstract: A polishing apparatus of a semiconductor wafer by a chemical-mechanical polishing method including a polishing platen having an upper surface on which a polishing pad is attached. The polishing platen is rotated in one direction along a central axis. A plurality of coaxial polishing-dressing head assemblies each having a lower surface opposed to an upper surface of the polishing pad on the polishing platen. Each of the coaxial assemblies holds a wafer to be polished while rotating along a central axis and pressing the rotating wafers on a radial portion of the rotating polishing pad. A polishing pad dressing ring is mounted coaxially encircling each of the wafer supporting heads. The applied compression on the wafer supporting heads pushes the wafer and the coaxially mounted dressing ring against the upper surface of the polishing pad therefore polishing each wafer while dressing the polishing pad.