Abstract: System and method transfer information from a primary processor to a co-processor. The primary processor includes an encoder, and the co-processor includes a decoder. To transfer information from the primary processor to the co-processor according to one embodiment of the present invention, the encoder in the primary processor creates an information word. An information word includes a plurality of bits, where each bit corresponds to a different type of information. The encoder sets the state of each bit to indicate whether information corresponding to that bit will be sent. The encoder then sends the information word, followed by the actual information. The decoder decodes the information word to determine what information will be arriving from the co-processor. The decoder identifies the information by the order in which it is received. Each different type of information is pre-assigned to a different register address in the co-processor.

Abstract: A computer imaging communications system includes a camera head having a CCD for the capture of video images according to a set of timing signals. The timing generator for the CCD is state-based such that state transitions in the CCD control logic can be controlled by a host computer or a camera adapter circuit. The set of timing signals provided to the CCD are generated in the camera head in response to a control/data signal generated by a controller which combines a clock with a coded control signal. The clocking signal has a variable frequency to allow video data to be generated at an arbitrary rate. First and second video signals defining a unique color space are output from the camera head and transmitted across a cable to the adapter card or host computer, where it is received for further processing.