Patents by Inventor Ranganathan P. Sankaralingam

Ranganathan P. Sankaralingam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Early estimation of power consumption for electronic circuit designs
    Patent number: 8201121
    Abstract: In one embodiment of the invention, a method of designing integrated circuits is disclosed. The method includes determining a power correction factor for a subset of partitions of circuits in an integrated circuit design; determining a gross power consumption estimate for all partitions of circuits in the integrated circuit design without synthesizing the entire integrated circuit design; and improving the accuracy of the gross power consumption estimate using the power correction factor to generate a reasonably accurate power consumption estimate for the entire integrated circuit design prior to substantially full circuit synthesis thereof.
    Type: Grant
    Filed: May 28, 2008
    Date of Patent: June 12, 2012
    Assignee: Cadence Design Systems, Inc.
    Inventors: Ranganathan P. Sankaralingam, Yan Meng