Patents by Inventor Rann Yeh

Rann Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060006462
    Abstract: Method and apparatus for a semiconductor device including high voltage MOS transistors is described. A substrate is provided with a low voltage and a high voltage region separated one from the other. Isolation regions containing an insulator are formed including at least one formed within one of said wells within the high voltage region. The angle of the transition from the active areas to the isolation regions in the high voltage device region is greater than a predetermined angle, in some embodiments it is greater than 40 degrees from vertical. In some embodiments the isolation regions are formed using shallow trench isolation techniques. In alternative embodiments the isolation regions are formed using field oxide formed by local oxidation of silicon techniques.
    Type: Application
    Filed: May 5, 2005
    Publication date: January 12, 2006
    Inventors: Chi-Hsuen Chang, Jun Liu, Tsung-Yi Huang, Chung-I Chen, Tzu-Chiang Sung, Chih Huang, Rann Yeh