Patents by Inventor Raoji A. Patel

Raoji A. Patel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7502699
    Abstract: A system and method for determining power use in a system are disclosed. Briefly described, one embodiment of a method comprises metering power flow into a metered front end rectifier system using a metering circuit residing in the metered front end rectifier system and coupled to an alternating current (AC) power source, determining information corresponding to the metered power flow and communicating the determined metered power flow information to a user interface.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: March 10, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Robert A. Guenther, Raoji Patel
  • Patent number: 7193410
    Abstract: A monitor system and method are described for sensing voltage changes in a plurality of transistors of a multiphase circuit comprising a sensor connected to each one of the plurality of transistors for measuring a voltage drop across the each one, a difference detector for comparing the voltage drop to a previous voltage drop attributable to the each one of the plurality of transistors, and a driver circuit for controlling a state of the plurality of transistors, wherein the driver circuit deactivates one or more of the plurality of transistors when the voltage drop varies from the previous voltage drop by a predefined amount.
    Type: Grant
    Filed: May 4, 2004
    Date of Patent: March 20, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Raoji A. Patel, Robert A. Guenther
  • Publication number: 20070027645
    Abstract: A system and method for determining power use in a system are disclosed. Briefly described, one embodiment of a method comprises metering power flow into a metered front end rectifier system using a metering circuit residing in the metered front end rectifier system and coupled to an alternating current (AC) power source, determining information corresponding to the metered power flow and communicating the determined metered power flow information to a user interface.
    Type: Application
    Filed: July 29, 2005
    Publication date: February 1, 2007
    Inventors: Robert Guenther, Raoji Patel
  • Publication number: 20060220463
    Abstract: In a computer system having redundant removable power supply modules, a power supply module comprises a voltage output and a signal input. At the voltage output, a voltage is supplied to components of the computer system. At the signal input, a module present signal is received from another power supply module. When the module present signal received from the other power supply module is asserted, the voltage is supplied at a nominal voltage. Upon deassertion of the module present signal received from the other power supply module, the voltage is increased to a maximum voltage.
    Type: Application
    Filed: April 4, 2005
    Publication date: October 5, 2006
    Inventors: Raoji Patel, Robert Guenther
  • Publication number: 20050248360
    Abstract: A monitor system and method are described for sensing voltage changes in a plurality of transistors of a multiphase circuit comprising a sensor connected to each one of the plurality of transistors for measuring a voltage drop across the each one, a difference detector for comparing the voltage drop to a previous voltage drop attributable to the each one of the plurality of transistors, and a driver circuit for controlling a state of the plurality of transistors, wherein the driver circuit deactivates one or more of the plurality of transistors when the voltage drop varies from the previous voltage drop by a predefined amount.
    Type: Application
    Filed: May 4, 2004
    Publication date: November 10, 2005
    Inventors: Raoji Patel, Robert Guenther
  • Publication number: 20050094330
    Abstract: Systems, methodologies, components, and other embodiments associated with converting power and bus architectures are described. One exemplary system embodiment comprises a first set of power converters configured to convert a received input power level to one or more power levels, and a second set of power converters. An interleaved intermediate bus is configured to supply independent and redundant input to the second set of power converters from the one or more output power levels of the first set of power converters.
    Type: Application
    Filed: November 5, 2003
    Publication date: May 5, 2005
    Inventors: Robert Guenther, Raoji Patel
  • Patent number: 6831544
    Abstract: A method and apparatus to layout planar magnetic coils on a PCB consists of maximizing the layer to layer overlap, and consequently maximizing total inductance for the given layout area, by spiraling alternating layers inward and outward. A further benefit of the matching opposite spirals is the ability to make the layer to layer electrical contacts within the magnetic field area, thus reducing leakage inductance, and minimizing the wasted extra conductor line length needed to make the connections outside the magnetic field. The reduced conductor line length results in reduced conductor line resistance. The method is applicable to voltage transformers and isolation transformers as well as simple inductors and other magnetic devices. In the transformer case the odd numbered layers are typically connected together in series to provide a larger turn ratio, and the even numbered layers are typically single turns (i.e., no spiral) connected together in parallel to provide more current capability.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: December 14, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Raoji A. Patel, James E. Drew, Raymond A. Pelletier, Brian R. McQuain
  • Publication number: 20040070481
    Abstract: A method and apparatus to layout planar magnetic coils on a PCB consists of maximizing the layer to layer overlap, and consequently maximizing total inductance for the given layout area, by spiraling alternating layers inward and outward. A further benefit of the matching opposite spirals is the ability to make the layer to layer electrical contacts within the magnetic field area, thus reducing leakage inductance, and minimizing the wasted extra conductor line length needed to make the connections outside the magnetic field. The reduced conductor line length results in reduced conductor line resistance. The method is applicable to voltage transformers and isolation transformers as well as simple inductors and other magnetic devices. In the transformer case the odd numbered layers are typically connected together in series to provide a larger turn ratio, and the even numbered layers are typically single turns (i.e., no spiral) connected together in parallel to provide more current capability.
    Type: Application
    Filed: October 9, 2003
    Publication date: April 15, 2004
    Inventors: Raoji A. Patel, James E. Drew, Raymond A. Pelletier, Brian R. McQuain
  • Patent number: 6664883
    Abstract: A method and apparatus to layout planar magnetic coils on a PCB consists of maximizing the layer to layer overlap, and consequently maximizing total inductance for the given layout area, by spiraling alternating layers inward and outward. A further benefit of the matching opposite spirals is the ability to make the layer to layer electrical contacts within the magnetic field area, thus reducing leakage inductance, and minimizing the wasted extra conductor line length needed to make the connections outside the magnetic field. The reduced conductor line length results in reduced conductor line resistance. The method is applicable to voltage transformers and isolation transformers as well as simple inductors and other magnetic devices. In the transformer case the odd numbered layers are typically connected together in series to provide a larger turn ratio, and the even numbered layers are typically single turns (i.e., no spiral) connected together in parallel to provide more current capability.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: December 16, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Raoji A. Patel, James E. Drew, Raymond A. Pelletier, Brian R. McQuain
  • Patent number: 6600668
    Abstract: A crowbar circuit comprises an over-voltage detector that monitors the output voltage of a synchronous DC/DC converter. When the output voltage rises above a predetermined threshold, the detector applies a control signal to a MOSFET switch that is already in use as part of a rectifier in the converter. The control signal overrides a periodic switching signal applied to the gate of the MOSFET, causing it to conduct continuously and thereby apply a shunt path for the output current of the rectifier. The control signal may be continuously applied until the converter is manually reset. Because the voltage across the conducting MOSFET is small and it can be turned on quickly, the MOSFET rapidly clamps the DC/DC converter's output to a voltage low enough to avoid damage to integrated circuitry powered by the converter.
    Type: Grant
    Filed: May 21, 2002
    Date of Patent: July 29, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Raoji A. Patel, Raymond A. Pelletier
  • Patent number: 6565382
    Abstract: A core mounting assembly includes a printed wiring board having a substrate with opposite sides, a winding on one side and a plurality of through holes extending through the substrate adjacent to the winding. A pair of mirror-image core sections are positioned against the sides of the board opposite the first winding, the core sections having corresponding portions which project into the through holes. A bracket has a back portion engaging one of the core sections and at least two legs extending from the back portion through two of the through holes in the board. A resilient cover member has a first end releasably secured to one of the legs, a second end releasably secured to the other of the legs and a bridging portion extending between the first and second ends and pressing against the other of the core sections so as to bias the core sections together.
    Type: Grant
    Filed: December 7, 2001
    Date of Patent: May 20, 2003
    Assignee: Hewelett-Packard Development Company, L.P.
    Inventors: William M. Blodgett, Richard E. Olson, Raoji A. Patel
  • Publication number: 20020149461
    Abstract: A method and apparatus to layout planar magnetic coils on a PCB consists of maximizing the layer to layer overlap, and consequently maximizing total inductance for the given layout area, by spiraling alternating layers inward and outward. A further benefit of the matching opposite spirals is the ability to make the layer to layer electrical contacts within the magnetic field area, thus reducing leakage inductance, and minimizing the wasted extra conductor line length needed to make the connections outside the magnetic field. The reduced conductor line length results in reduced conductor line resistance. The method is applicable to voltage transformers and isolation transformers as well as simple inductors and other magnetic devices. In the transformer case the odd numbered layers are typically connected together in series to provide a larger turn ratio, and the even numbered layers are typically single turns (i.e., no spiral) connected together in parallel to provide more current capability.
    Type: Application
    Filed: June 11, 2002
    Publication date: October 17, 2002
    Applicant: Compaq Computer Corporation
    Inventors: Raoji A. Patel, James E. Drew, Raymond A. Pelletier, Brian R. McQuain
  • Patent number: 6456510
    Abstract: A regulated power supply in which square wave output of a switching rectifier is applied to a filter comprises a series inductor and a parallel capacitor. This filter lacks a series resistor. The ramp signal is developed across a second capacitor in series with a first resistor, and in parallel with the rectifier output. An amplifier adds the ramp signal to a signal representing the error in the DC output voltage of the power supply, producing an output that is fed to a control circuit. The control circuit in response generates a voltage control signal that controls the switching of the rectifier.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: September 24, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Raoji Patel, Robert Wolf
  • Patent number: 6429763
    Abstract: A method and apparatus to layout planar magnetic coils on a PCB consists of maximizing the layer to layer overlap, and consequently maximizing total inductance for the given layout area, by spiraling alternating layers inward and outward. A further benefit of the matching opposite spirals is the ability to make the layer to layer electrical contacts within the magnetic field area, thus reducing leakage inductance, and minimizing the wasted extra conductor line length needed to make the connections outside the magnetic field. The reduced conductor line length results in reduced conductor line resistance. The method is applicable to voltage transformers and isolation transformers as well as simple inductors and other magnetic devices. In the transformer case the odd numbered layers are typically connected together in series to provide a larger turn ratio, and the even numbered layers are typically single turns (i.e., no spiral) connected together in parallel to provide more current capability.
    Type: Grant
    Filed: February 1, 2000
    Date of Patent: August 6, 2002
    Assignee: Compaq Information Technologies Group, L.P.
    Inventors: Raoji A. Patel, James E. Drew, Raymond A. Pelletier, Brian R. McQuain
  • Publication number: 20020057171
    Abstract: A method and apparatus to layout planar magnetic coils on a PCB consists of maximizing the layer to layer overlap, and consequently maximizing total inductance for the given layout area, by spiraling alternating layers inward and outward. A further benefit of the matching opposite spirals is the ability to make the layer to layer electrical contacts within the magnetic field area, thus reducing leakage inductance, and minimizing the wasted extra conductor line length needed to make the connections outside the magnetic field. The reduced conductor line length results in reduced conductor line resistance. The method is applicable to voltage transformers and isolation transformers as well as simple inductors and other magnetic devices. In the transformer case the odd numbered layers are typically connected together in series to provide a larger turn ratio, and the even numbered layers are typically single turns (i.e., no spiral) connected together in parallel to provide more current capability.
    Type: Application
    Filed: February 1, 2000
    Publication date: May 16, 2002
    Inventors: Raoji A. Patel, James E. Drew, Raymond A. Pelletier, Brian R. McQuain
  • Patent number: 6373732
    Abstract: A method of preventing current hogging in parallel connected transformers, and an apparatus for efficiently implementing the method are presented. Current hogging occurs when synchronous power converter transformers operate in a low output current mode. Low output current demands are typically meet by adjusting the duty cycle of the transformer to a low level. This results in the catch FET maintaining a low resistance path to ground for long time periods and allows a stronger one of the parallel power converter transformers to sink current to ground through a weaker transformer. The method consists of using a current sensor to detect low or negative output currents, and then driving the transistor providing the path to ground to an off state.
    Type: Grant
    Filed: February 1, 2000
    Date of Patent: April 16, 2002
    Assignee: Compaq Information Technologies Group, L.P.
    Inventors: Raoji A. Patel, Raymond A. Pelletier, Robert J. Wolf
  • Patent number: 5305185
    Abstract: There is provided a method and materials for cooling the power train components, such as transformers, rectifiers, chokes, and the like, of an integrated on-board power supply IOP) using a single heatsink. Spacers are positioned between the power train components and a substrate, the substrate for mounting the components. The spacers are individually dimensioned and shaped to raise the heat-removal surfaces of the components to a substantially uniform and minimal height. A heatsink having a substantially planar, heat-acquiring surface is positioned on the heat-removal surfaces of the power train components. Fasteners are used to compress the spacers, urging the components against the heatsink to provide a substantially continuous and coplanar thermal interface between the components and the heatsink. After the components, heat sink and substrate have been fastened to each other, the components are electrically connected to the substrate by soldering.
    Type: Grant
    Filed: September 30, 1992
    Date of Patent: April 19, 1994
    Inventors: Victor M. Samarov, Joseph A. DeCarolis, Raoji Patel, Gerald J. Piche, Glenn R. Skutt, Steve W. Norris
  • Patent number: 4716514
    Abstract: A synchronous power rectifier incorporating a bipolar power transistor operable in a switching mode to rectify the energy from a secondary winding of a power transformer. The synchronous rectifier reduces or eliminates the need of rectifier diodes, which provides power rectification without the power loss associated with the rectifier diode voltage drops. Moreover, the present invention includes further refinements of the circuit, including adjustment of the rectifier switching time to accommodate delayed turn-off times of bipolar power devices, and adjustment of the switching signal duration to provide output voltage regulation independent of the excitation of the transformer primary. The resulting embodiments of the present invention provide a modular switching power supply circuit of high efficiency, which may be operable together in combination to provide multiple output voltages.
    Type: Grant
    Filed: September 22, 1986
    Date of Patent: December 29, 1987
    Assignee: Unitrode Corporation
    Inventor: Raoji Patel