Patents by Inventor Rasika Subramanian
Rasika Subramanian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12210434Abstract: An apparatus and method for closed loop dynamic resource allocation.Type: GrantFiled: June 27, 2020Date of Patent: January 28, 2025Assignee: Intel CorporationInventors: Bin Li, Ren Wang, Kshitij Arun Doshi, Francesc Guim Bernat, Yipeng Wang, Ravishankar Iyer, Andrew Herdrich, Tsung-Yuan Tai, Zhu Zhou, Rasika Subramanian
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Patent number: 11983408Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to allocate a first memory portion to a first application as a combination of a local memory and remote memory, wherein the remote memory is shared between multiple compute nodes, and manage a first memory balloon associated with the first memory portion based on two or more memory tiers associated with the local memory and the remote memory. Other embodiments are disclosed and claimed.Type: GrantFiled: May 3, 2023Date of Patent: May 14, 2024Assignee: Intel CorporationInventors: Rasika Subramanian, Lidia Warnes, Francesc Guim Bernat, Mark A. Schmisseur, Durgesh Srivastava
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Publication number: 20230333738Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to allocate a first memory portion to a first application as a combination of a local memory and remote memory, wherein the remote memory is shared between multiple compute nodes, and manage a first memory balloon associated with the first memory portion based on two or more memory tiers associated with the local memory and the remote memory. Other embodiments are disclosed and claimed.Type: ApplicationFiled: May 3, 2023Publication date: October 19, 2023Applicant: Intel CorporationInventors: Rasika Subramanian, Lidia Warnes, Francesc Guim Bernat, Mark A. Schmisseur, Durgesh Srivastava
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Patent number: 11681439Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to allocate a first memory portion to a first application as a combination of a local memory and remote memory, wherein the remote memory is shared between multiple compute nodes, and manage a first memory balloon associated with the first memory portion based on two or more memory tiers associated with the local memory and the remote memory. Other embodiments are disclosed and claimed.Type: GrantFiled: June 26, 2020Date of Patent: June 20, 2023Assignee: Intel CorporationInventors: Rasika Subramanian, Lidia Warnes, Francesc Guim Bernat, Mark A. Schmisseur, Durgesh Srivastava
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Patent number: 11573722Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to provide an interface to a pooled memory that is configured as a combination of local memory and remote memory, wherein the remote memory is shared between multiple compute nodes, allocate respective memory portions of the pooled memory to respective tenants, associate respective memory balloons with the respective tenants that correspond to the allocated respective memory portions, and manage the respective memory balloons based on the respective tenants and two or more memory tiers associated with the pooled memory. Other embodiments are disclosed and claimed.Type: GrantFiled: August 6, 2020Date of Patent: February 7, 2023Assignee: Intel CorporationInventors: Rasika Subramanian, Lidia Warnes, Francesc Guim Bernat, Mark A. Schmisseur, Durgesh Srivastava
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Patent number: 11507430Abstract: Examples described herein can be used to determine and suggest a computing resource allocation for a workload request made from an edge gateway. The computing resource allocation can be suggested using computing resources provided by an edge server cluster. Telemetry data and performance indicators of the workload request can be tracked and used to determine the computing resource allocation. Artificial intelligence (AI) and machine learning (ML) techniques can be used in connection with a neural network to accelerate determinations of suggested computing resource allocations based on hundreds to thousands (or more) of telemetry data in order to suggest a computing resource allocation. Suggestions made can be accepted or rejected by a resource allocation manager for the edge gateway and the edge server cluster.Type: GrantFiled: September 27, 2018Date of Patent: November 22, 2022Assignee: Intel CorporationInventors: Rasika Subramanian, Francesc Guim Bernat, David Zimmerman
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Publication number: 20220283951Abstract: A method is described. The method includes determining that a memory page is in one of an active state and an idle state from meta data that is maintained for the memory page. The method includes recording a past history of active/idle state determinations that were previously made for the memory page. The method includes training a neural network on the past history of the memory page. The method includes using the neural network to predict one of a future active state and future idle state for the memory page. The method includes determining a location for the memory page based on the past history of the memory page and the predicted future state of the memory page, the location being one of a faster memory and a slower memory. The method includes moving the memory page to the location from the other one of the faster memory and the slower memory.Type: ApplicationFiled: May 23, 2022Publication date: September 8, 2022Inventors: Neha PATHAPATI, Lidia WARNES, Durgesh SRIVASTAVA, Francois DUGAST, Navneet SINGH, Rasika SUBRAMANIAN, Sidharth N. KASHYAP
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Publication number: 20210406147Abstract: An apparatus and method for closed loop dynamic resource allocation.Type: ApplicationFiled: June 27, 2020Publication date: December 30, 2021Inventors: BIN LI, REN WANG, KSHITIJ ARUN DOSHI, FRANCESC GUIM BERNAT, YIPENG WANG, RAVISHANKAR IYER, ANDREW HERDRICH, TSUNG-YUAN TAI, ZHU ZHOU, RASIKA SUBRAMANIAN
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Publication number: 20200363975Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to provide an interface to a pooled memory that is configured as a combination of local memory and remote memory, wherein the remote memory is shared between multiple compute nodes, allocate respective memory portions of the pooled memory to respective tenants, associate respective memory balloons with the respective tenants that correspond to the allocated respective memory portions, and manage the respective memory balloons based on the respective tenants and two or more memory tiers associated with the pooled memory. Other embodiments are disclosed and claimed.Type: ApplicationFiled: August 6, 2020Publication date: November 19, 2020Applicant: Intel CorporationInventors: Rasika Subramanian, Lidia Warnes, Francesc Guim Bernat, Mark A. Schmisseur, Durgesh Srivastava
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Publication number: 20200326861Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to allocate a first memory portion to a first application as a combination of a local memory and remote memory, wherein the remote memory is shared between multiple compute nodes, and manage a first memory balloon associated with the first memory portion based on two or more memory tiers associated with the local memory and the remote memory. Other embodiments are disclosed and claimed.Type: ApplicationFiled: June 26, 2020Publication date: October 15, 2020Applicant: Intel CorporationInventors: Rasika Subramanian, Lidia Warnes, Francesc Guim Bernat, Mark A. Schmisseur, Durgesh Srivastava
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Publication number: 20200104184Abstract: Examples described herein can be used to determine and suggest a computing resource allocation for a workload request made from an edge gateway. The computing resource allocation can be suggested using computing resources provided by an edge server cluster. Telemetry data and performance indicators of the workload request can be tracked and used to determine the computing resource allocation. Artificial intelligence (AI) and machine learning (ML) techniques can be used in connection with a neural network to accelerate determinations of suggested computing resource allocations based on hundreds to thousands (or more) of telemetry data in order to suggest a computing resource allocation. Suggestions made can be accepted or rejected by a resource allocation manager for the edge gateway and the edge server cluster.Type: ApplicationFiled: September 27, 2018Publication date: April 2, 2020Inventors: Rasika SUBRAMANIAN, Francesc GUIM BERNAT, David ZIMMERMAN
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Patent number: 10444813Abstract: A computing device, a method and a system to control power. The computing device is configured to be used as part of a network fabric including a plurality of nodes and a plurality of pooled accelerators coupled to the nodes. The computing device includes: a memory storing instructions; and processing circuitry configured to perform the instructions. The processing circuitry is to receive respective requests from respective ones of the plurality of nodes, the requests addressed to a plurality of corresponding accelerators, each of the respective requests including information on a kernel to be executed by a corresponding accelerator, on the corresponding accelerator, and on a performance target for execution of the kernel. The processing circuitry is further to, based on the information in said each of the respective requests, control a power supply to the corresponding accelerator.Type: GrantFiled: September 28, 2017Date of Patent: October 15, 2019Assignee: Intel CorporationInventors: Rasika Subramanian, Francesc Guim Bernat, Steen Larsen
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Publication number: 20190094926Abstract: A computing device, a method and a system to control power. The computing device is configured to be used as part of a network fabric including a plurality of nodes and a plurality of pooled accelerators coupled to the nodes. The computing device includes: a memory storing instructions; and processing circuitry configured to perform the instructions. The processing circuitry is to receive respective requests from respective ones of the plurality of nodes, the requests addressed to a plurality of corresponding accelerators, each of the respective requests including information on a kernel to be executed by a corresponding accelerator, on the corresponding accelerator, and on a performance target for execution of the kernel. The processing circuitry is further to, based on the information in said each of the respective requests, control a power supply to the corresponding accelerator.Type: ApplicationFiled: September 28, 2017Publication date: March 28, 2019Applicant: Intel CorporationInventors: Rasika Subramanian, Francesc Guim Bernat, Steen Larsen