Patents by Inventor Rathod RONAK KISHORBHAI

Rathod RONAK KISHORBHAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High operation frequency, area efficient and cost effective content addressable memory architecture
    Patent number: 10572440
    Abstract: Various embodiments provide a content addressable memory (CAM) architecture that utilizes non-bit addressable memory, such as a single or dual port random access memory. The CAM includes a first non-bit addressable memory, a second non-bit addressable memory, a multiplexer, a write operation encoder, a read operation encoder, and a match signal generator. In contrast to bit addressable memories, non-bit addressable memories are widely available, have high performance frequency, and are area efficient as compared to bit addressable memories. Accordingly, the CAM architecture described herein has low costs and time to market, increased processing time, and improved area efficiency.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: February 25, 2020
    Assignee: STMICROELECTRONICS INTERNATIONAL N.V.
    Inventors: Tejinder Kumar, Rathod Ronak Kishorbhai, Apurva Sen, Rakesh Malik
  • HIGH OPERATION FREQUENCY, AREA EFFICIENT & COST EFFECTIVE CONTENT ADDRESSABLE MEMORY ARCHITECTURE
    Publication number: 20190197014
    Abstract: Various embodiments provide a content addressable memory (CAM) architecture that utilizes non-bit addressable memory, such as a single or dual port random access memory. The CAM includes a first non-bit addressable memory, a second non-bit addressable memory, a multiplexer, a write operation encoder, a read operation encoder, and a match signal generator. In contrast to bit addressable memories, non-bit addressable memories are widely available, have high performance frequency, and are area efficient as compared to bit addressable memories. Accordingly, the CAM architecture described herein has low costs and time to market, increased processing time, and improved area efficiency.
    Type: Application
    Filed: December 21, 2017
    Publication date: June 27, 2019
    Inventors: Tejinder KUMAR, Rathod RONAK KISHORBHAI, Apurva SEN, Rakesh MALIK