Patents by Inventor Ratna Kumar Venkata PARUPUDI

Ratna Kumar Venkata PARUPUDI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11493649
    Abstract: In described examples, a charge sensitive amplifier (CSA) generates an integrated signal in response to a current signal. A high pass filter is coupled to the CSA and receives the integrated signal and an inverse of an event signal, the high pass filter generates a coarse signal. An active comparator is coupled to the high pass filter and receives the coarse signal and a primary reference voltage signal, the active comparator generates the event signal.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: November 8, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rakul Viswanath, Nagesh Surendranath, Sandeep Kesrimal Oswal, Ratna Kumar Venkata Parupudi
  • Publication number: 20210310863
    Abstract: A dark current compensation circuit comprises a first comparator having inputs for a detection signal and a first voltage, and a second comparator having inputs for the detection signal and a second voltage. The dark current compensation circuit also comprises a controller coupled to the first and second comparators, which has an input for an event signal. An adjustable current source is coupled to the controller and configured to generate a compensation current. The controller adjusts a value of the compensation current based on the first and second comparator outputs and maintains a constant value in response to the event signal indicating photons incident on a photon detector. In some implementations, the dark current compensation circuit further comprises an analog sub-circuit coupled to the adjustable current source and configured to receive the detection signal. The analog sub-circuit generates an analog compensation current in response to the detection signal.
    Type: Application
    Filed: June 16, 2021
    Publication date: October 7, 2021
    Inventors: Rakul VISWANATH, Nagesh SURENDRANATH, Sandeep Kesrimal OSWAL, Ratna Kumar Venkata PARUPUDI
  • Patent number: 11067440
    Abstract: A dark current compensation circuit comprises a first comparator having inputs for a detection signal and a first voltage, and a second comparator having inputs for the detection signal and a second voltage. The dark current compensation circuit also comprises a controller coupled to the first and second comparators, which has an input for an event signal. An adjustable current source is coupled to the controller and configured to generate a compensation current. The controller adjusts a value of the compensation current based on the first and second comparator outputs and maintains a constant value in response to the event signal indicating photons incident on a photon detector. In some implementations, the dark current compensation circuit further comprises an analog sub-circuit coupled to the adjustable current source and configured to receive the detection signal. The analog sub-circuit generates an analog compensation current in response to the detection signal.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: July 20, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rakul Viswanath, Nagesh Surendranath, Sandeep Kesrimal Oswal, Ratna Kumar Venkata Parupudi
  • Publication number: 20210088680
    Abstract: In described examples, a charge sensitive amplifier (CSA) generates an integrated signal in response to a current signal. A high pass filter is coupled to the CSA and receives the integrated signal and an inverse of an event signal, the high pass filter generates a coarse signal. An active comparator is coupled to the high pass filter and receives the coarse signal and a primary reference voltage signal, the active comparator generates the event signal.
    Type: Application
    Filed: December 8, 2020
    Publication date: March 25, 2021
    Inventors: Rakul VISWANATH, Nagesh SURENDRANATH, Sandeep Kesrimal OSWAL, Ratna Kumar Venkata PARUPUDI
  • Patent number: 10890674
    Abstract: In described examples, a charge sensitive amplifier (CSA) generates an integrated signal in response to a current signal. A high pass filter is coupled to the CSA and receives the integrated signal and an inverse of an event signal, the high pass filter generates a coarse signal. An active comparator is coupled to the high pass filter and receives the coarse signal and a primary reference voltage signal, the active comparator generates the event signal.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: January 12, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rakul Viswanath, Nagesh Surendranath, Sandeep Kesrimal Oswal, Ratna Kumar Venkata Parupudi
  • Publication number: 20200393294
    Abstract: A dark current compensation circuit comprises a first comparator having inputs for a detection signal and a first voltage, and a second comparator having inputs for the detection signal and a second voltage. The dark current compensation circuit also comprises a controller coupled to the first and second comparators, which has an input for an event signal. An adjustable current source is coupled to the controller and configured to generate a compensation current. The controller adjusts a value of the compensation current based on the first and second comparator outputs and maintains a constant value in response to the event signal indicating photons incident on a photon detector. In some implementations, the dark current compensation circuit further comprises an analog sub-circuit coupled to the adjustable current source and configured to receive the detection signal. The analog sub-circuit generates an analog compensation current in response to the detection signal.
    Type: Application
    Filed: June 11, 2019
    Publication date: December 17, 2020
    Inventors: Rakul VISWANATH, Nagesh SURENDRANATH, Sandeep Kesrimal OSWAL, Ratna Kumar Venkata PARUPUDI
  • Publication number: 20200225370
    Abstract: In described examples, a charge sensitive amplifier (CSA) generates an integrated signal in response to a current signal. A high pass filter is coupled to the CSA and receives the integrated signal and an inverse of an event signal, the high pass filter generates a coarse signal. An active comparator is coupled to the high pass filter and receives the coarse signal and a primary reference voltage signal, the active comparator generates the event signal.
    Type: Application
    Filed: January 15, 2019
    Publication date: July 16, 2020
    Inventors: Rakul VISWANATH, Nagesh SURENDRANATH, Sandeep Kesrimal OSWAL, Ratna Kumar Venkata PARUPUDI
  • Patent number: 10024979
    Abstract: A photon counting system includes a photon sensor and pixel circuitry. The pixel circuitry includes a charge sensitive amplifier (CSA), an analog to digital converter (ADC), an event detector, and a coincidence detector. The CSA is configured to convert photon energy detected by the photon sensor to a voltage pulse. The ADC is coupled to an output of the CSA. The ADC is configured to digitize the voltage pulses generated by the CSA. The event detector is configured to determine whether output voltage of the CSA exceeds an event threshold voltage, and to trigger the ADC to digitize the output voltage based on the output voltage exceeding the event threshold voltage. The coincidence detector is configured to determine whether the output voltage of the CSA exceeds a coincidence threshold voltage, and to trigger the ADC to digitize the output voltage based on the output voltage exceeding the coincidence threshold voltage.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: July 17, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rakul Viswanath, Nagesh Surendranath, Ratna Kumar Venkata Parupudi
  • Patent number: 9748966
    Abstract: A system includes an analog-to-digital converter (ADC) including an ADC input terminal; an ADC output terminal; and analog components configured to convert an analog signal received at the ADC input terminal to a digital signal. The system also includes a histogram estimation circuit coupled to the ADC output terminal and configured to generate information on a plurality of codes generated by the ADC and determine a region defining a range of codes corresponding to an occurrence of an error caused by the analog components of the ADC. The system also includes a dither circuit coupled to the ADC input terminal and configured to introduce a dither in the analog signal to generate a modified analog signal.
    Type: Grant
    Filed: August 8, 2016
    Date of Patent: August 29, 2017
    Assignee: Texas Instruments Incorporated
    Inventors: Viswanathan Nagarajan, Srinivas Kumar Reddy Naru, Ratna Kumar Venkata Parupudi
  • Publication number: 20170041013
    Abstract: A system includes an analog-to-digital converter (ADC) including an ADC input terminal; an ADC output terminal; and analog components configured to convert an analog signal received at the ADC input terminal to a digital signal. The system also includes a histogram estimation circuit coupled to the ADC output terminal and configured to generate information on a plurality of codes generated by the ADC and determine a region defining a range of codes corresponding to an occurrence of an error caused by the analog components of the ADC. The system also includes a dither circuit coupled to the ADC input terminal and configured to introduce a dither in the analog signal to generate a modified analog signal.
    Type: Application
    Filed: August 8, 2016
    Publication date: February 9, 2017
    Inventors: Viswanathan NAGARAJAN, Srinivas Kumar Reddy NARU, Ratna Kumar Venkata PARUPUDI