Patents by Inventor Ratsamee Limdulpaiboon

Ratsamee Limdulpaiboon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220262643
    Abstract: Aspects generally relate to methods, systems, and apparatus for processing substrates using one or more amorphous carbon hardmask layers. In one aspect, film stress is altered while facilitating enhanced etch selectivity. In one implementation, a method of processing a substrate includes depositing one or more amorphous carbon hardmask layers onto the substrate, and conducting a rapid thermal anneal operation on the substrate after depositing the one or more amorphous carbon hardmask layers. The rapid thermal anneal operation lasts for an anneal time that is 60 seconds or less. The rapid thermal anneal operation includes heating the substrate to an anneal temperature that is within a range of 600 degrees Celsius to 1,000 degrees Celsius. The method includes etching the substrate after conducting the rapid thermal anneal operation.
    Type: Application
    Filed: February 18, 2021
    Publication date: August 18, 2022
    Inventors: Krishna NITTALA, Sarah Michelle BOBEK, Kwangduk Douglas LEE, Ratsamee LIMDULPAIBOON, Dimitri KIOUSSIS, Karthik JANAKIRAMAN
  • Publication number: 20220098728
    Abstract: The present disclosure relates to a method for in situ seasoning of process chamber components, such as electrodes. The method includes depositing a silicon oxide film over the process chamber component and converting the silicon oxide film to a silicon-carbon-containing film. The silicon-carbon-containing film forms a protective film over the process chamber components and is resistant to plasma processing and/or dry etch cleaning. The coatings has high density, good emissivity control, and reduces risk of device property drift.
    Type: Application
    Filed: September 29, 2020
    Publication date: March 31, 2022
    Inventors: Sarah Michelle BOBEK, Abdul Aziz Khaja, Ratsamee Limdulpaiboon, Kwangduk Douglas Lee
  • Publication number: 20220020589
    Abstract: Exemplary methods of semiconductor processing may include forming a first plasma of a silicon-containing precursor and an oxygen-containing precursor within a processing region of a semiconductor processing chamber. The methods may also include depositing a coating from first effluents of the first plasma on surfaces defining the processing region to a target thickness greater than or about 0.5 ?m. Forming the first plasma may occur at a first power greater than or about 300 W. The surfaces defining the processing region may include a surface of a faceplate that faces the processing region.
    Type: Application
    Filed: July 19, 2020
    Publication date: January 20, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Lu Xu, Ratsamee Limdulpaiboon, Kwangduk Douglas Lee
  • Publication number: 20200362457
    Abstract: The present disclosure relates to systems and methods for reducing the formation of hardware residue and minimizing secondary plasma formation during substrate processing in a process chamber. The process chamber may include a gas distribution member configured to flow a first gas into a process volume and generate a plasma therefrom. A second gas is supplied into a lower region of the process volume. Further, an exhaust port is disposed in the lower region to remove excess gases or by-products from the process volume during or after processing.
    Type: Application
    Filed: April 24, 2020
    Publication date: November 19, 2020
    Inventors: Liangfa HU, Prashant Kumar KULSHRESHTHA, Anjana M. PATEL, Abdul Aziz KHAJA, Viren KALSEKAR, Vinay K. PRABHAKAR, Satya Teja Babu THOKACHICHU, Byung Seok KWON, Ratsamee LIMDULPAIBOON, Kwangduk Douglas LEE, Ganesh BALASUBRAMANIAN
  • Publication number: 20200328066
    Abstract: A system and method for forming a film includes generating a plasma in a processing volume of a processing chamber to form the film on a substrate. The processing chamber may include a gas distributor configured to generate the plasma in the processing volume. Further, a barrier gas is provided into the processing volume to form a gas curtain around a plasma located in the processing volume. The barrier gas is supplied by a gas supply source through an inlet port disposed along a first side of the processing chamber. Further, an exhaust port is disposed along the first side of the processing chamber and the plasma and the barrier gas is purged via the exhaust port.
    Type: Application
    Filed: March 25, 2020
    Publication date: October 15, 2020
    Inventors: Byung Seok KWON, Dong Hyung LEE, Prashant Kumar KULSHRESHTHA, Kwangduk Douglas LEE, Ratsamee LIMDULPAIBOON, Irfan JAMIL, Pyeong Youn ROH, Jun MA, Amit Kumar BANSAL, Tuan Anh NGUYEN, Juan Carlos ROCHA-ALVAREZ
  • Patent number: 9245793
    Abstract: Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber enclosing a substrate support, a remote plasma source, and a showerhead. A substrate heater can be mounted in the substrate support. A transport system moves the substrate support and is capable of positioning the substrate. The plasma system may be used to generate activated species. The activated species can be used to treat the surfaces of low-k and/or ultra low-k dielectric materials to facilitate improved deposition of diffusion barrier materials.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: January 26, 2016
    Assignee: Intermolecular, Inc.
    Inventors: Ratsamee Limdulpaiboon, Frank Greer, Chi-I Lang, J. Watanabe, Wenxian Zhu
  • Patent number: 9196475
    Abstract: Integrated circuits and methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming an interlayer of dielectric oxide material in a FET region and overlying a semiconductor substrate. A high-K dielectric layer is deposited overlying the interlayer. Fluorine is incorporated into the interlayer and/or the high-K dielectric layer.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: November 24, 2015
    Assignees: GLOBALFOUNDRIES, INC., INTERMOLECULAR, INC.
    Inventors: Bongki Lee, Paul Besser, Kevin Kashefi, Olov Karlsson, Ashish Bodke, Ratsamee Limdulpaiboon, Divya Pisharoty, Nobi Fuchigami
  • Publication number: 20150303057
    Abstract: Integrated circuits and methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming an interlayer of dielectric oxide material in a FET region and overlying a semiconductor substrate. A high-K dielectric layer is deposited overlying the interlayer. Fluorine is incorporated into the interlayer and/or the high-K dielectric layer.
    Type: Application
    Filed: April 16, 2014
    Publication date: October 22, 2015
    Applicants: GLOBALFOUNDRIES, Inc., Intermolecular, Inc.
    Inventors: Bongki Lee, Paul Besser, Kevin Kashefi, Olov Karlsson, Ashish Bodke, Ratsamee Limdulpaiboon, Divya Pisharoty, Nobi Fuchigami
  • Publication number: 20150179509
    Abstract: Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber enclosing a substrate support, a remote plasma source, and a showerhead. A substrate heater can be mounted in the substrate support. A transport system moves the substrate support and is capable of positioning the substrate. The plasma system may be used to generate activated species. The activated species can be used to treat the surfaces of low-k and/or ultra low-k dielectric materials to facilitate improved deposition of diffusion barrier materials.
    Type: Application
    Filed: December 19, 2013
    Publication date: June 25, 2015
    Applicant: Intermolecular, Inc.
    Inventors: Ratsamee Limdulpaiboon, Frank Greer, Chi-I Lang, J. Watanabe, Wenxian Zhu
  • Patent number: 8987143
    Abstract: Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber enclosing a substrate support, a remote plasma source, and a showerhead. A substrate heater can be mounted in the substrate support. A transport system moves the substrate support and is capable of positioning the substrate. The plasma system may be used to generate activated hydrogen species. The activated hydrogen species can be used to etch/clean semiconductor oxide surfaces such as silicon oxide or germanium oxide.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: March 24, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Ratsamee Limdulpaiboon, Chi-I Lang, Sandip Niyogi, J. Watanabe
  • Patent number: 8901677
    Abstract: A germanium-containing semiconductor surface is prepared for formation of a dielectric overlayer (e.g., a thin layer of high-k gate dielectric) by (1) removal of native oxide, for example by wet cleaning, (2) additional cleaning with hydrogen species, (3) in-situ formation of a controlled monolayer of GeO2, and (4) in-situ deposition of the dielectric overlayer to prevent uncontrolled regrowth of native oxide. The monolayer of GeO2 promotes uniform nucleation of the dielectric overlayer, but it too thin to appreciably impact the effective oxide thickness of the dielectric overlayer.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: December 2, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Frank Greer, Edwin Adhiprakasha, Chi-I Lang, Ratsamee Limdulpaiboon, Sandip Niyogi, Kurt Pang, J. Watanabe
  • Publication number: 20140273309
    Abstract: Remote-plasma treatments of surfaces, for example in semiconductor manufacture, can be improved by preferentially exposing the surface to only a selected subset of the plasma species generated by the plasma source. The probability that a selected species reaches the surface, or that an unselected species is quenched or otherwise converted or diverted before reaching the surface, can be manipulated by introducing additional gases with selected properties either at the plasma source or in the process chamber, varying chamber pressure or flow rate to increase or decrease collisions, or changing the dimensions or geometry of the injection ports, conduits and other passages traversed by the species. Some example processes treat surfaces preferentially with relatively low-energy radicals, vary the concentration of radicals at the surface in real time, or clean and passivate in the same unit process.
    Type: Application
    Filed: October 10, 2013
    Publication date: September 18, 2014
    Applicant: Intermolecular, Inc.
    Inventors: Sandip Niyogi, Sean Barstow, Jay Dedontney, Chi-I Lang, Ratsamee Limdulpaiboon, Martin Romero, Sunil Shanker, James Tsung, J. Watanabe
  • Publication number: 20140264281
    Abstract: Semiconductor devices and methods of making thereof are disclosed. A field effect transistor (FET) is provided comprising a substrate, a first layer disposed above the substrate, the first layer being operable as a gate electrode, a second layer disposed above the first layer, the second layer comprising a dielectric material, a third layer disposed above the second layer, the third layer comprising a semiconductor, and a fourth layer comprising one or more conductive materials and operable as source and drain electrodes disposed above the third layer. In some embodiments, the dielectric material comprises a high-? dielectric. In some embodiments, the source and drain electrodes comprise one or more metals. The source and drain electrodes are each in ohmic contact with an area of the top surface of the third layer, and substantially all of the current through the transistor flows through the ohmic contacts.
    Type: Application
    Filed: December 20, 2013
    Publication date: September 18, 2014
    Applicant: Intermolecular, Inc.
    Inventors: Sandip Niyogi, Sean Barstow, Chi-I Lang, Ratsamee Limdulpaiboon, Dipankar Pramanik, J. Watanabe
  • Publication number: 20140273493
    Abstract: Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber enclosing a substrate support, a remote plasma source, and a showerhead. A substrate heater can be mounted in the substrate support. A transport system moves the substrate support and is capable of positioning the substrate. The plasma system may be used to generate activated hydrogen species. The activated hydrogen species can be used to etch/clean semiconductor oxide surfaces such as silicon oxide or germanium oxide.
    Type: Application
    Filed: September 19, 2013
    Publication date: September 18, 2014
    Applicant: Intermolecular, Inc.
    Inventors: Ratsamee Limdulpaiboon, Chi-I Lang, Sandip Niyogi, J. Watanabe
  • Publication number: 20140252565
    Abstract: A germanium-containing semiconductor surface is prepared for formation of a dielectric overlayer (e.g., a thin layer of high-k gate dielectric) by (1) removal of native oxide, for example by wet cleaning, (2) additional cleaning with hydrogen species, (3) in-situ formation of a controlled monolayer of GeO2, and (4) in-situ deposition of the dielectric overlayer to prevent uncontrolled regrowth of native oxide. The monolayer of GeO2 promotes uniform nucleation of the dielectric overlayer, but it too thin to appreciably impact the effective oxide thickness of the dielectric overlayer.
    Type: Application
    Filed: March 5, 2014
    Publication date: September 11, 2014
    Applicant: Intermolecular, Inc.
    Inventors: Frank Greer, Edwin Adhiprakasha, Chi-I Lang, Ratsamee Limdulpaiboon, Sandip Niyogi, Kurt Pang, J. Watanabe
  • Patent number: 7435684
    Abstract: This invention relates to electronic device fabrication processes for making devices such as semiconductor wafers and resolves the fluorine loading effect in the reaction chamber of a HDP CVD apparatus used for forming dielectric layers in high aspect ratio, narrow width recessed features. The fluorine loading effect in the chamber is minimized and wafers are provided having less deposition thickness variations by employing the method using a hydrogen plasma treatment of the chamber and the substrate after the chamber has been used to grow a dielectric film on a substrate. After the hydrogen plasma treatment of the chamber, the chamber is treated with an etchant gas to etch the substrate. Preferably a hydrogen gas is then introduced into the chamber after the etching process and the process repeated until the fabrication process is complete. The wafer is then removed from the chamber and a new wafer placed in the chamber and the above fabrication process repeated.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: October 14, 2008
    Assignee: Novellus Systems, Inc.
    Inventors: Chi-I Lang, Ratsamee Limdulpaiboon, Kan Quan Vo
  • Patent number: 7381451
    Abstract: High density plasma (HDP) techniques form high tensile stress silicon oxide films. The HDP techniques use low enough temperatures to deposit high tensile stress silicon oxide films in transistor architectures and fabrication processes effective for generating channel strain without adversely impacting transistor integrity. Methods involve a two phase process: a HDP deposition phase, wherein silanol groups are formed in the silicon oxide film, and a bond reconstruction phase, wherein water is removed and tensile stress is induced in the silicon oxide film. Transistor strain can be generated in NMOS or PMOS devices using strategic placement of the high tensile stress silicon oxide. Example applications include high tensile stress silicon oxides for use in shallow trench isolation structures, pre-metal dielectric layer and silicon on insulator substrates.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: June 3, 2008
    Assignee: Novellus Systems, Inc.
    Inventors: Chi-i Lang, Ratsamee Limdulpaiboon, Cayetano Gonzalez
  • Patent number: 7344996
    Abstract: Plasma etch processes incorporating helium-based etch chemistries can remove dielectric a semiconductor applications. In particular, high density plasma chemical vapor etch-enhanced (deposition-etch-deposition) gap fill processes incorporating etch chemistries which incorporate helium as the etchant that can effectively fill high aspect ratio gaps while reducing or eliminating dielectric contamination by etchant chemical species.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: March 18, 2008
    Assignee: Novellus Systems, Inc.
    Inventors: Chi-I Lang, Wenxian Zhu, Ratsamee Limdulpaiboon, Judy H. Huang