Abstract: In one embodiment, a method includes forming a plurality of vias partially through a body, the vias including sidewalls defined by the body. An electrically insulating layer is formed on the sidewalls and on an upper surface of the body. An electrically conductive layer is formed on the insulating layer in the vias and on the upper surface, the electrically conductive layer defining first metal pads on the upper surface and second metal pads in contact with the first metal pads, the second metal pads having a denser pitch than the first metal pads. A dielectric layer is formed between adjacent first metal pads and between adjacent second metal pads. The body is thinned through a lower surface and the electrically insulating layer in the vias is exposed. After the thinning, a portion of the electrically insulating layer in the, vias is removed. The body is coupled to a substrate.

Abstract: The formation of electronic assemblies, including assemblies having an interposer, are described. In one embodiment, a method includes forming a plurality of vias extending partially through a body, the vias including sidewalls defined by the body. An insulating layer is formed on the sidewalls and on an upper surface of the body. An electrically conductive layer is formed on the insulating layer in the vias and on the upper surface of the body, the electrically conductive layer defining a first metal pad layer on the upper surface and a second metal pad layer in contact with the first metal pad layer, the second metal pad layer having a denser pitch between adjacent pads than the first metal pad layer. The method also includes forming a dielectric layer between the adjacent metal pads in the first and second pad layers. The method also includes coupling a plurality of elements to the second metal pad layer.

Abstract: The formation of electronic assemblies is described. One embodiment includes providing a body and forming a first metal pad layer on a first surface thereof. A second metal pad layer is formed in contact with the first metal pad layer, the second metal pad layer having a denser pitch than the first metal pad layer. A dielectric layer is formed between the metal pads in the first and second metal pad layers. Vias extending through the body from a second surface thereof are formed, the vias exposing the first metal pad layer. An insulating layer is formed on via sidewalls and on the second surface, and an electrically conductive layer formed on the insulating layer and on the exposed surface of the first metal layer. Elements are coupled to the second metal pad layer and the electrically conductive layer coupled to a substrate. Other embodiments are described and claimed.

Abstract: One embodiment relates to forming a plurality of vias extending partially through a body, the vias including sidewalls defined by the body. An insulating layer is formed on the sidewalls and on an upper surface of the body. An electrically conductive layer is formed on the insulating layer, the electrically conductive layer defining first metal pads on the upper surface and second metal pads in contact with the first metal pads, the second metal pads having a denser pitch than the first metal pads. A dielectric layer is formed between adjacent first metal pads and between adjacent second metal pads. A plurality of electronic elements are coupled to the second metal pads. After the coupling the elements, the body is thinned through a lower surface. A portion of the insulating layer in the vias is removed and the electrically conductive layer is coupled to a substrate.

Abstract: In one embodiment, the present invention includes a semiconductor package having a support substrate coupled to a first semiconductor die, where the first semiconductor die includes first conductive bumps, and a second semiconductor die includes second conductive bumps, and where the first and second die are coupled by joints formed of the first and second conductive bumps and a solder material therebetween. Other embodiments are described and claimed.

Abstract: In one embodiment, the present invention includes a semiconductor package having a support substrate coupled to a first semiconductor die, where the first semiconductor die includes first conductive bumps, and a second semiconductor die includes second conductive bumps, and where the first and second die are coupled by joints formed of the first and second conductive bumps and a solder material therebetween. Other embodiments are described and claimed.

Abstract: The formation of electronic assemblies, including assemblies having an interposer, are described. In one embodiment, a method includes providing a body and forming a first metal pad layer on a first surface thereof. A second metal pad layer is formed in contact with the first patterned metal pad layer, the second metal pad layer having a denser pitch between adjacent pads than the first metal pad layer. A dielectric layer is formed between the adjacent metal pads in the first and second metal pad layers. After the forming the first and second metal pad layers and the dielectric layer, the method includes forming a plurality of vias extending through the body from a second surface thereof, the vias extending through a thickness of the body and exposing the first metal pad layer. The method also includes forming an insulating layer on sidewalls of the vias and on the second surface, and forming an electrically conductive layer on the insulating layer and on the exposed surface of the first metal layer.

Abstract: The formation of electronic assemblies, including assemblies having an interposer, are described. In one embodiment, a method includes forming a plurality of vias extending partially through a body, the vias including sidewalls defined by the body. An insulating layer is formed on the sidewalls and on an upper surface of the body. An electrically conductive layer is formed on the insulating layer in the vias and on the upper surface of the body, the electrically conductive layer defining a first metal pad layer on the upper surface and a second metal pad layer in contact with the first metal pad layer, the second metal pad layer having a denser pitch between adjacent pads than the first metal pad layer. The method also includes forming a dielectric layer between the adjacent metal pads in the first and second pad layers. The method also includes coupling a plurality of elements to the second metal pad layer.