Patents by Inventor Rausch Harold

Rausch Harold has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Advanced bit fail map compression with fail signature analysis
    Patent number: 6564346
    Abstract: A method for providing a compressed bit fail map, in accordance with the invention includes the steps of testing a semiconductor device to determine failed devices and transferring failure information to display a compressed bit map by designating areas of the bit map for corresponding failure locations on the semiconductor device. Failure classification is provided by designating shapes and dimensions of fail areas in the designated areas of the bit map such that the fail area shapes and dimensions indicate a fail type.
    Type: Grant
    Filed: December 7, 1999
    Date of Patent: May 13, 2003
    Assignee: Infineon Technologies Richmond, LP.
    Inventors: Joerg Vollrath, Ulf Lederer, Peter Oswald, Thomas Hladschik, Zschunke Andreas, Rausch Harold