Patents by Inventor Ravi Apte

Ravi Apte has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240070204
    Abstract: A current set of context features for a database query that is associated with a string is identified. The database query includes a sequence of tokens of a database syntax, and the current set of context features includes words from the string and tokens from the database query. An inference record is selected from an inference store based on a comparison of the current set of context features to context features of inference records in the inference store. The database query is modified using a resolution of the inference record to obtain an inferred database query. The resolution includes one or more tokens of the database syntax. A search of a database is invoked using a query based on the inferred database query to obtain search results.
    Type: Application
    Filed: September 1, 2023
    Publication date: February 29, 2024
    Inventors: Amit Prakash, Ravi Tandon, Manikanta Venkata Rahul Balakavi, Pavan Ram Piratla, Ashish Shubham, Alonzo Canada, Rakesh Kothari, Maneesh Apte, Amitabh Singhal, Aditya Viswanathan, Ajeet Singh
  • Patent number: 8418100
    Abstract: A method for performing robust scan synthesis for soft-error protection on a design for generating a robust scan design in a system is modeled selectively at a register-transfer level (RTL) or a gate level; the design includes at least a sequential element or a scan cell for mapping to a robust scan cell of a select robust scan cell type. The method comprises performing a scan replacement and a scan stitching on the design database based on a given control information file for synthesizing the robust scan cell on the design database; and generating the synthesized robust scan design at a pre-determined RTL or a pre-determined gate level.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: April 9, 2013
    Assignee: STARDFX Technologies, Inc.
    Inventors: Laung-Terng Wang, Nur A. Touba, Shianling Wu, Ravi Apte
  • Publication number: 20120173940
    Abstract: A method for performing robust scan synthesis for soft-error protection on a design for generating a robust scan design in a system is modeled selectively at a register-transfer level (RTL) or a gate level; the design includes at least a sequential element or a scan cell for mapping to a robust scan cell of a select robust scan cell type. The method comprises performing a scan replacement and a scan stitching on the design database based on a given control information file for synthesizing the robust scan cell on the design database; and generating the synthesized robust scan design at a pre-determined RTL or a pre-determined gate level.
    Type: Application
    Filed: March 9, 2012
    Publication date: July 5, 2012
    Applicant: StarDFX Technologies, Inc.
    Inventors: Laung-Terng WANG, Nur A. Touba, Zhigang Jiang, Shianling Wu, Ravi Apte
  • Patent number: 8161441
    Abstract: A method for performing robust scan synthesis for soft-error protection on a design for generating a robust scan design in a system. The system is modeled selectively at a register-transfer level (RTL) or a gate level; the design includes at least a sequential element or a scan cell for mapping to a robust scan cell of a select robust scan cell type. The method comprises performing a scan replacement and a scan stitching on the design database based on a given control information file for synthesizing the robust scan cell on the design database; and generating the synthesized robust scan design at a pre-determined RTL or a pre-determined gate level.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: April 17, 2012
    Assignee: STARDFX Technologies, Inc.
    Inventors: Laung-Terng Wang, Nur A. Touba, Zhigang Jiang, Shianling Wu, Ravi Apte
  • Publication number: 20110022908
    Abstract: A method for performing robust scan synthesis for soft-error protection on a design for generating a robust scan design in a system. The system is modeled selectively at a register-transfer level (RTL) or a gate level; the design includes at least a sequential element or a scan cell for mapping to a robust scan cell of a select robust scan cell type. The method comprises performing a scan replacement and a scan stitching on the design database based on a given control information file for synthesizing the robust scan cell on the design database; and generating the synthesized robust scan design at a pre-determined RTL or a pre-determined gate level.
    Type: Application
    Filed: July 24, 2009
    Publication date: January 27, 2011
    Applicant: StarDFX Technologies, Inc.
    Inventors: Laung-Terng WANG, Nur A. Touba, Zhigang Jiang, Shianling Wu, Ravi Apte