Abstract: A large-scale field-programmable analog array (FPAA) for rapidly prototyping analog systems and an arbitrary analog waveform generator. The large-scale FPAA includes a floating-gate transistor array and a plurality of computational analog blocks (CABs), which may be adapted to set bias voltages for operational transconductance amplifiers (OTAs), adjust corner frequencies on the capacitively coupled current conveyors, set multiplier coefficients in vector-matrix multipliers, and a variety of other operations. The floating-gate transistors may be used as switch elements, programmable resistor elements, precision current sources, and programmable transistors. Accordingly, the floating-gate transistors within the array allow on-chip programming of the characteristics of the computational elements, while still maintaining compact CABs. The arbitrary analog waveform generator may include programmable floating-gate MOS transistors for use as analog memory cells to store samples of the waveforms.

Abstract: A large-scale field-programmable analog array (FPAA) for rapidly prototyping analog systems and an arbitrary analog waveform generator. The large-scale FPAA includes a floating-gate transistor array and a plurality of computational analog blocks (CABs), which may be adapted to set bias voltages for operational transconductance amplifiers (OTAs), adjust corner frequencies on the capacitively coupled current conveyors, set multiplier coefficients in vector-matrix multipliers, and a variety of other operations. The floating-gate transistors may be used as switch elements, programmable resistor elements, precision current sources, and programmable transistors. Accordingly, the floating-gate transistors within the array allow on-chip programming of the characteristics of the computational elements, while still maintaining compact CABs. The arbitrary analog waveform generator may include programmable floating-gate MOS transistors for use as analog memory cells to store samples of the waveforms.

Abstract: A semiconductor test system includes at least one semiconductor wafer having working dies and at least one test die formed therein. Each of the working dies includes at least one bipolar transistor. A tester selectively supplies a changing direct current (DC) input signal to a selected test die and monitors a DC output signal therefrom. Each test die includes a test oscillator having at least one sample bipolar transistor substantially identical to the bipolar transistors of the working dies. The test oscillator switches between a non-oscillating state and an oscillating state as the DC input signal changes, and generates the DC output signal to the tester indicative of switching between the non-oscillating state and the oscillating state. A threshold level of a bias current that causes the test oscillator to switch between the non-oscillating state and the oscillating state is correlated to the maximum oscillation frequency and the transition frequency of the sample bipolar transistor.