Abstract: Embodiments of system and method for coordination among neighboring networks for communications over shared physical medium are provided. In one aspect, a method comprises determining, by a first domain master of a first network domain, a first number of network nodes of the first network domain that interfere with data transmission on the physical medium by at least one network node of at least one other network domain, or a second number of network nodes of the at least one other network domain that interfere with data transmission on the physical medium by at least one network node of the first network domain. The method further comprises causing, by the first domain master, one or more network nodes of the first network domain to transmit data during one of a plurality of non-overlapping time slots of a MAC cycle.

Abstract: Embodiments of system and method for coordination among neighboring networks for communications over shared physical medium are provided. In one aspect, a method comprises determining, by a first domain master of a first network domain, a first number of network nodes of the first network domain that interfere with data transmission on the physical medium by at least one network node of at least one other network domain, or a second number of network nodes of the at least one other network domain that interfere with data transmission on the physical medium by at least one network node of the first network domain. The method further comprises causing, by the first domain master, one or more network nodes of the first network domain to transmit data during one of a plurality of non-overlapping time slots of a MAC cycle.

Abstract: Embodiments of system and method for coordination among neighboring networks for communications over shared physical medium are provided. In one aspect, a method comprises determining, by a first domain master of a first network domain, a first number of network nodes of the first network domain that interfere with data transmission on the physical medium by at least one network node of at least one other network domain, or a second number of network nodes of the at least one other network domain that interfere with data transmission on the physical medium by at least one network node of the first network domain. The method further comprises causing, by the first domain master, one or more network nodes of the first network domain to transmit data during one of a plurality of non-overlapping time slots of a MAC cycle.

Abstract: The framer, also referred to as the scrambler/Reed-Solomon encoder (SRS), is a part of the transmitter and accepts user and control data in the form of one or more logical channels, partitions this data into frames, adds error correction codes, randomizes the data through a scrambler, and multiplexes logical channels into a single data stream. The multiplexed data is then passed to the constellation encoder as the next step in the formation of the VDSL symbol. The deframer, also referred as the descrambler/Reed-Solomon decoder (DRS), is part of the receiver and performs the inverse function of the framer.

Abstract: Embodiments of system and method for coordination among neighboring networks for communications over shared physical medium are provided. In one aspect, a method comprises determining, by a first domain master of a first network domain, a first number of network nodes of the first network domain that interfere with data transmission on the physical medium by at least one network node of at least one other network domain, or a second number of network nodes of the at least one other network domain that interfere with data transmission on the physical medium by at least one network node of the first network domain. The method further comprises causing, by the first domain master, one or more network nodes of the first network domain to transmit data during one of a plurality of non-overlapping time slots of a MAC cycle.

Abstract: The framer, also referred to as the scrambler/Reed-Solomon encoder (SRS), is a part of the transmitter and accepts user and control data in the form of one or more logical channels, partitions this data into frames, adds error correction codes, randomizes the data through a scrambler, and multiplexes logical channels into a single data stream. The multiplexed data is then passed to the constellation encoder as the next step in the formation of the VDSL symbol. The deframer, also referred as the descrambler/Reed-Solomon decoder (DRS), is part of the receiver and performs the inverse function of the framer.

Abstract: A multicarrier transceiver is disclosed that includes a digital signal processor with a plurality of memory locations, a direct memory, an encoder module coupled to receive data from the FIFO buffers, a decoder module coupled to receive data from the FIFO buffers, a Fourier transform module configured to perform an inverse Fast Fourier transform for transmit operations and to perform Fast Fourier transform (FFT) operations for receive operations, a plurality of distributed modules including the encoder module, the decoder module and the Fourier transform module, each module configured with a memory port, each memory port coupled to a peripheral bus and the DMA bus, a plurality of memory ports coupled to each of the distributed modules, the plurality of memory ports coupled to a peripheral bus, and a plurality of point-to-point buses coupled to each of the distributed modules, the point-to-point bus configured to enable data flow and testing and provide a bypass capability for each of the distributed modules.

Abstract: The framer, also referred to as the scrambler/Reed-Solomon encoder (SRS), is a part of the transmitter and accepts user and control data in the form of one or more logical channels, partitions this data into frames, adds error correction codes, randomizes the data through a scrambler, and multiplexes logical channels into a single data stream. The multiplexed data is then passed to the constellation encoder as the next step in the formation of the VDSL symbol. The deframer, also referred as the descrambler/Reed-Solomon decoder (DRS), is part of the receiver and performs the inverse function of the framer.

Abstract: A system and method for providing bit-loading enhancement is provided, including methods of determining an extended bit capacity for a plurality of carriers, wherein a first portion of the plurality of carriers is loaded and a second portion of the plurality of carriers is initially unloaded and bits are allocated between said first and second portions in accordance with power requirements for loading bits onto said first or second portion of the plurality of carriers, as well as methods of optimizing the average signal to noise margin for a plurality of carriers, wherein a first portion of the plurality of carriers is loaded and a second portion of the plurality of carriers is initially unloaded, and bits are loaded from the first portion onto the second portion in accordance with a power savings related to such a loading from the first portion onto the second portion.

Abstract: A method and device for calculating syndromes used in forward-error-correction codes. To calculate syndromes more quickly using a computer with memory access latency, the polynomial equation C(X) is divided by a generator polynomial G(X) to form a remainder polynomial R(X). The remainder polynomial R(X) is then used to speed the calculation of the syndromes. A method of dividing a Nth order dividend polynomial by a 2R order divisor polynomial is also described. In addition, to further speed the calculation of syndromes, the generating polynomial is split into a number of sub-polynomials Gj(X) to yield a number of remainder sub-polynomials Rj(X) used to calculate the syndromes. Calculation of syndromes using evaluation by Horner's rule and a generalization thereof is also described.

Abstract: A method and device for calculating syndromes used in forward-error-correction codes. To calculate syndromes more quickly using a computer with memory access latency, the polynomial equation C(X) is divided by a generator polynomial G(X) to form a remainder polynomial R(X). The remainder polynomial R(X) is then used to speed the calculation of the syndromes. A method of dividing a Nth order dividend polynomial by a 2R order divisor polynomial is also described. In addition, to further speed the calculation of syndromes, the generating polynomial is split into a number of sub-polynomials G.sub.j (X) to yield a number of remainder sub-polynomials R.sub.j (X) used to calculate the syndromes. Calculation of syndromes using evaluation by Horner's rule and a generalization thereof is also described.

Abstract: A method and device for calculating Cyclical Redundancy Checksums (CRC) used in error-detection codes. To calculate CRCs more quickly using a computer with memory access latency, a frame of data is partitioned into a plurality of sub-frames. A look-up table containing pre-computed CRC values is stored in computer memory and accessed during the CRC calculation of the sub-frames. The CRC of the sub-frames can then be calculated and combined to form the CRC of the frame of data. To speed the calculation, CRCs of a number of the sub-frames can be calculated simultaneously.

Abstract: A method and device for evaluating polynomial equations with a logic computer. To evaluate the polynomial equation more efficiently using a computer with latent memory accesses, the polynomial is split into a plurality of sub-polynomials. The sub-polynomials can be simultaneously evaluated using Horner's rule. The results of the sub-polynomial evaluations are summed to obtain the evaluation of the polynomial equation. A device and method are described.