Patents by Inventor Ravi Kummaraguntla
Ravi Kummaraguntla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11621683Abstract: A system may include a front end differential amplifier having two input terminals, two input resistors, each of the two input resistors coupled to a respective one of the two input terminals, and an input common mode biasing circuit for an output stage of the front end differential amplifier, the input common mode biasing circuit comprising two current sources configured to generate currents for biasing the output stage of the front end differential amplifier.Type: GrantFiled: January 29, 2021Date of Patent: April 4, 2023Assignee: Cirrus Logic, Inc.Inventors: Wei Xu, Ravi Kummaraguntla, Paul Wilson, Mujo Kozak, Christian Larsen, John L. Melanson, Yongjie Cheng
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Publication number: 20220247372Abstract: A system may include a front end differential amplifier having two input terminals, two input resistors, each of the two input resistors coupled to a respective one of the two input terminals, and an input common mode biasing circuit for an output stage of the front end differential amplifier, the input common mode biasing circuit comprising two current sources configured to generate currents for biasing the output stage of the front end differential amplifier.Type: ApplicationFiled: January 29, 2021Publication date: August 4, 2022Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Wei XU, Ravi KUMMARAGUNTLA, Paul WILSON, Mujo KOZAK, Christian LARSEN, John L. MELANSON, Yongjie CHENG
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Publication number: 20180324525Abstract: Input impedance biasing may be improved with an ultra-high-input-impedance biasing circuit having low temperature variation. The impedance biasing circuit may include a first transistor coupled to a first power supply and a second transistor coupled to a second power supply. A gate of the first transistor may be coupled to a gate of the second transistor at an intermediate bias node. The first transistor and the second transistor may provide a selected DC impedance at the intermediate bias node. The impedance may be used to provide low-pass and or high-pass filtering of audio signals and/or noise.Type: ApplicationFiled: May 3, 2017Publication date: November 8, 2018Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Vivek Saraf, Axel Thomsen, Ravi Kummaraguntla, John C. Tucker
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Patent number: 10123117Abstract: Input impedance biasing may be improved with an ultra-high-input-impedance biasing circuit having low temperature variation. The impedance biasing circuit may include a first transistor coupled to a first power supply and a second transistor coupled to a second power supply. A gate of the first transistor may be coupled to a gate of the second transistor at an intermediate bias node. The first transistor and the second transistor may provide a selected DC impedance at the intermediate bias node. The impedance may be used to provide low-pass and or high-pass filtering of audio signals and/or noise.Type: GrantFiled: May 3, 2017Date of Patent: November 6, 2018Assignee: Cirrus Logic, Inc.Inventors: Vivek Saraf, Axel Thomsen, Ravi Kummaraguntla, John C. Tucker
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Patent number: 9490865Abstract: A transceiver includes a transmit/receive terminal, a receiver input terminal, a plurality of impedance transformation networks coupled in series, a plurality of power amplifiers, and a controller. Each impedance transformation network has first and second ports. The impedance transformation networks include at least one selectable impedance transformation network having a resonant mode and a termination mode. The power amplifiers have outputs respectively coupled to the second ports of corresponding ones of the impedance transformation networks. In a receive mode, the controller selects the resonant mode for each selectable impedance transformation network and disables all power amplifiers. In a transmit mode, the controller enables a selected power amplifier and selects the resonant mode of any upstream selectable impedance transformation network, and selects the termination mode of a downstream selectable impedance transformation network.Type: GrantFiled: April 19, 2016Date of Patent: November 8, 2016Assignee: SILICON LABORATORIES, INCInventors: Aslamali A. Rafi, Ravi Kummaraguntla
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Publication number: 20160233919Abstract: A transceiver includes a transmit/receive terminal, a receiver input terminal, a plurality of impedance transformation networks coupled in series, a plurality of power amplifiers, and a controller. Each impedance transformation network has first and second ports. The impedance transformation networks include at least one selectable impedance transformation network having a resonant mode and a termination mode. The power amplifiers have outputs respectively coupled to the second ports of corresponding ones of the impedance transformation networks. In a receive mode, the controller selects the resonant mode for each selectable impedance transformation network and disables all power amplifiers. In a transmit mode, the controller enables a selected power amplifier and selects the resonant mode of any upstream selectable impedance transformation network, and selects the termination mode of a downstream selectable impedance transformation network.Type: ApplicationFiled: April 19, 2016Publication date: August 11, 2016Applicant: Silicon Laboratories Inc.Inventors: Aslamali A. Rafi, Ravi Kummaraguntla
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Publication number: 20160156380Abstract: A transceiver comprises a transmit/receive terminal, a receiver input terminal, a scalable impedance network, a plurality of power amplifiers, and a receiver. The scalable impedance network is coupled between the transmit/receive terminal and the receiver input terminal and has a plurality of taps in an order between the transmit/receive terminal and the receiver input terminal, in which an impedance looking into any given tap toward the transmit/receive terminal is smaller than an impedance looking into a subsequent tap toward the transmit/receive terminal, if any, in the order. The plurality of power amplifiers are arranged in an order and have outputs respectively coupled to the plurality of taps of the scalable impedance network. A power of any given power amplifier is higher than a power of a subsequent power amplifier, if any, in the order. The receiver is coupled to the receiver input terminal.Type: ApplicationFiled: December 2, 2014Publication date: June 2, 2016Applicant: SILICON LABORATORIES INC.Inventors: Aslamali A. Rafi, Ravi Kummaraguntla
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Patent number: 9350412Abstract: A transceiver comprises a transmit/receive terminal, a receiver input terminal, a scalable impedance network, a plurality of power amplifiers, and a receiver. The scalable impedance network is coupled between the transmit/receive terminal and the receiver input terminal and has a plurality of taps in an order between the transmit/receive terminal and the receiver input terminal, in which an impedance looking into any given tap toward the transmit/receive terminal is smaller than an impedance looking into a subsequent tap toward the transmit/receive terminal, if any, in the order. The plurality of power amplifiers are arranged in an order and have outputs respectively coupled to the plurality of taps of the scalable impedance network. A power of any given power amplifier is higher than a power of a subsequent power amplifier, if any, in the order. The receiver is coupled to the receiver input terminal.Type: GrantFiled: December 2, 2014Date of Patent: May 24, 2016Assignee: SILICON LABORATORIES INC.Inventors: Aslamali A. Rafi, Ravi Kummaraguntla
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Patent number: 8604884Abstract: A ring oscillator that is more insensitive to power supply ripple utilizes an amplifier circuit having a first input coupled to a reference voltage. A current is generated that represents a control voltage supplied to the oscillator control circuit. That current is mirrored and supplied as a control current to the oscillator. An amplifier is used in a feedback loop to ensure that incremental variations in source to drain voltage of a first transistor of the current mirror is present in a second transistor of the current mirror to make the control current more immune to supply ripple.Type: GrantFiled: June 30, 2011Date of Patent: December 10, 2013Assignee: Silicon Laboratories Inc.Inventors: Abdulkerim L. Coban, Ravi Kummaraguntla
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Publication number: 20130002361Abstract: A ring oscillator that is more insensitive to power supply ripple utilizes an amplifier circuit having a first input coupled to a reference voltage. A current is generated that represents a control voltage supplied to the oscillator control circuit. That current is mirrored and supplied as a control current to the oscillator. An amplifier is used in a feedback loop to ensure that incremental variations in source to drain voltage of a first transistor of the current mirror is present in a second transistor of the current mirror to make the control current more immune to supply ripple.Type: ApplicationFiled: June 30, 2011Publication date: January 3, 2013Inventors: Abdulkerim L. Coban, Ravi Kummaraguntla