Patents by Inventor Ravi Mysore Shantamurthy

Ravi Mysore Shantamurthy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12360897
    Abstract: A computing system that enables data stored in a persistent memory region to be preserved when a processor fails can include volatile memory comprising the persistent memory region, non-volatile memory, and a system on a chip (SoC). The SoC can include a main processor that is communicatively coupled to both the volatile memory and the non-volatile memory. The SoC can also include an auxiliary processor that is communicatively coupled to both the volatile memory and the non-volatile memory. The SoC can also include instructions that are executable by the auxiliary processor to cause the data in the persistent memory region of the volatile memory to be transferred to the non-volatile memory in response to a failure of the main processor.
    Type: Grant
    Filed: April 15, 2024
    Date of Patent: July 15, 2025
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ravi Mysore Shantamurthy, Mallik Bulusu, Tom Long Nguyen, Muhammad Ashfaq Ahmed, Madhav Himanshubhai Pandya
  • Patent number: 12210784
    Abstract: A computer implemented method includes creating a cache within system management memory to cache data from a firmware flash memory to allow access to the cache by system firmware, providing a baseboard management controller ownership of the firmware flash memory in a server, updating the firmware in the firmware flash memory via the baseboard management controller, relinquishing baseboard management controller ownership of firmware flash memory upon completion of updating the firmware, and flushing the cache back to the firmware flash memory in response to baseboard management controller relinquishing ownership of the firmware flash memory.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: January 28, 2025
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Mallik Bulusu, Tom Long Nguyen, Daini Xie, Karunakara Kotary, Muhammad Ashfaq Ahmed, Subhankar Panda, Ravi Mysore Shantamurthy
  • Publication number: 20240211257
    Abstract: A computer implemented method includes creating a cache within system management memory to cache data from a firmware flash memory to allow access to the cache by system firmware, providing a baseboard management controller ownership of the firmware flash memory in a server, updating the firmware in the firmware flash memory via the baseboard management controller, relinquishing baseboard management controller ownership of firmware flash memory upon completion of updating the firmware, and flushing the cache back to the firmware flash memory in response to baseboard management controller relinquishing ownership of the firmware flash memory.
    Type: Application
    Filed: December 27, 2022
    Publication date: June 27, 2024
    Inventors: Mallik BULUSU, Tom Long NGUYEN, Daini XIE, Karunakara KOTARY, Muhammad Ashfaq AHMED, Subhankar PANDA, Ravi Mysore Shantamurthy
  • Patent number: 11983111
    Abstract: A computing system that enables data stored in a persistent memory region to be preserved when a processor fails can include volatile memory comprising the persistent memory region, non-volatile memory, and a system on a chip (SoC). The SoC can include a main processor that is communicatively coupled to both the volatile memory and the non-volatile memory. The SoC can also include an auxiliary processor that is communicatively coupled to both the volatile memory and the non-volatile memory. The SoC can also include instructions that are executable by the auxiliary processor to cause the data in the persistent memory region of the volatile memory to be transferred to the non-volatile memory in response to a failure of the main processor.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: May 14, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ravi Mysore Shantamurthy, Mallik Bulusu, Tom Long Nguyen, Muhammad Ashfaq Ahmed, Madhav Himanshubhai Pandya
  • Patent number: 11544148
    Abstract: To preserve error context during a reboot of a computing device, firmware within the computing device can be configured to implement a method that includes determining where the error context is stored in volatile memory. The method can also include identifying a plurality of recorder regions in non-volatile memory that have been assigned to store the error context. The plurality of recorder regions can be disaggregated across a plurality of distinct non-volatile memory regions. The method can also include flushing the error context from a plurality of different volatile memory locations to the plurality of recorder regions in response to detecting a trigger. The flushing can occur prior to the reboot of the computing device. The method can also include restoring at least some of the error context to the volatile memory after the computing device has been rebooted.
    Type: Grant
    Filed: April 2, 2021
    Date of Patent: January 3, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Mallik Bulusu, Muhammad Ashfaq Ahmed, Tom Long Nguyen, Neeraj Ladkani, Ravi Mysore Shantamurthy
  • Patent number: 11379212
    Abstract: While booting a host computing device on a cloud computing system, system firmware (such as Basic Input/Output System (BIOS) or Unified Extensible Firmware Interface (UEFI)) sends a query to a management subsystem (such as a baseboard management controller (BMC)) for updated configuration data used during a boot of the host computing device. The management subsystem sends the updated configuration data to the system firmware, and boot instructions in the system firmware compare the updated configuration data with configuration data stored on the host computing device. If the respective configuration data match, the boot instructions continue with booting the host computing device. If the configuration data do not match, then the boot instructions update the stored configuration data with the updated configuration data and then proceed to boot the host computing device.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: July 5, 2022
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Ravi Mysore Shantamurthy, Muhammad Ashfaq Ahmed, Mallik Bulusu, Neeraj Ladkani, Sagar Dharia
  • Patent number: 11269729
    Abstract: A computing device, such as a server in a cloud computing system, can be configured to enable error mitigation actions to be performed when the computing device experiences a failure. The computing device includes firmware that can be configured to detect an error indication during a boot sequence of the server, determine at least one desired error mitigation action based at least in part on the error indication, and create a boot error record that identifies the at least one desired error mitigation action. The computing device also includes an operating system that can be configured to obtain the boot error record during the boot sequence and cause the at least one desired error mitigation action that is identified in the boot error record to be performed.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: March 8, 2022
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Mallik Bulusu, Ravi Mysore Shantamurthy, Muhammad Ashfaq Ahmed
  • Patent number: 11157265
    Abstract: Example techniques for updating a firmware, such as BIOS, are disclosed. Upon receiving an update, it is determined whether a secondary non-volatile memory is defined for the firmware. If the secondary non-volatile memory is defined, the update may be written in the secondary non-volatile memory. Further, to apply the update, a warm reboot of the firmware may be performed. The warm reboot causes an OS of the computing system to restart, while preserving data associated with applications running on the computing system.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: October 26, 2021
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Mallik Bulusu, Ramakoti R. Bhimanadhuni, Ravi Mysore Shantamurthy
  • Patent number: 11113188
    Abstract: Combined operational steps and device characteristics help preserve data against integrity threats. Data is divided into critical data and non-critical data, based on criteria such as customer requirements, workload criticality, or virtual machine criticality. Data may be generated in a compute node for storage in a storage node, for example. Critical data is stored in a battery-backed memory aperture at physical addresses where it will be flushed ahead of the non-critical data due to a flush order imposed by or on the battery-backed memory, e.g., a bottom-up NVDIMM flush order. Redundant copies of the data (especially non-critical data) may also be kept in case it does not get flushed in time. Battery-backed memory apertures are sized and located according to their battery's characteristics, and may be relocated or resized as conditions change. Flush defragging is performed to optimize use of the aperture, especially within the portion that holds critical data.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: September 7, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Mallik Bulusu, Tom L. Nguyen, Neeraj Ladkani, Ravi Mysore Shantamurthy
  • Patent number: 10996893
    Abstract: A computing device including a memory module. The computing device may further include a processor configured to, by executing instructions of an operating system, divide a non-volatile region of the memory module into a first non-volatile storage partition allocated to the operating system and a second non-volatile storage partition allocated to system firmware. The processor may write a globally unique identifier (GUID) to the non-volatile region. The GUID may indicate a location of a boundary between the first non-volatile storage partition and the second non-volatile storage partition. The processor may access the first non-volatile storage partition. By executing instructions of the system firmware, the processor may determine the location of the boundary. The processor may access the second non-volatile storage partition.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: May 4, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Mallik Bulusu, Tom Long Nguyen, Ravi Mysore Shantamurthy, Devendu Sharma
  • Patent number: 10896087
    Abstract: An error-handling system provides detection of an error on an I/O hardware endpoint, triggering of an operating system interrupt in response to detected error, reception of the interrupt at an operating system component, determination, in response to the received interrupt, whether to handle the error using an operating system handler or a firmware error handler associated with the I/O hardware endpoint, and, if it is determined to handle the error using a firmware runtime error handler associated with the I/O hardware endpoint, triggering of a firmware interrupt associated with the firmware runtime error handler.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: January 19, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ravi Mysore Shantamurthy, Tom Long Nguyen, Mallik Bulusu
  • Patent number: 10115442
    Abstract: A computing device may comprise a processor, a volatile memory and a non-volatile storage device. An operating system or firmware of the device may cause one or more pages of the volatile memory to be treated, by applications executing on the computing device, as non-volatile memory pages. A number of pages that may be treated as non-volatile may be determined based on demand for non-volatile storage by at least one application executing on the computing device.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: October 30, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Bryan D. Kelly, Mallik Bulusu, Ravi Mysore Shantamurthy, Tom L. Nguyen
  • Publication number: 20170212687
    Abstract: A computing device may comprise a processor, a volatile memory and a non-volatile storage device. An operating system or firmware of the device may cause one or more pages of the volatile memory to be treated, by applications executing on the computing device, as non-volatile memory pages. A number of pages that may be treated as non-volatile may be determined based on demand for non-volatile storage by at least one application executing on the computing device.
    Type: Application
    Filed: August 30, 2016
    Publication date: July 27, 2017
    Inventors: Bryan D. Kelly, Mallik Bulusu, Ravi Mysore Shantamurthy, Tom L. Nguyen