Abstract: A liner for use in a horticultural planter contains an integral water tray which is located between inner and outer fibrous layers of a liner. The water tray extends from a bottom surface of the liner to a peripheral top edge. The water tray is integral with the liner and located between outer and inner fibrous layers. The water tray extends also from the bottom surface to a peripheral edge which is spaced apart from the peripheral top edge of the liner. An overflow region is therefore formed between the peripheral top edge of the liner and the peripheral edge of the water tray.

Abstract: A liner for use in a horticultural planter contains an integral water tray which is located between inner and outer fibrous layers of a liner. The water tray extends from a bottom surface of the liner to a peripheral top edge. The water tray is integral with the liner and located between outer and inner fibrous layers. The water tray extends also from the bottom surface to a peripheral edge which is spaced apart from the peripheral top edge of the liner. An overflow region is therefore formed between the peripheral top edge of the liner and the peripheral edge of the water tray.

Abstract: The formation of a barrier layer over a high k dielectric layer and deposition of a conducting layer over the barrier layer prevents intermigration between the species of the high k dielectric layer and the conducting layer and prevents oxygen scavenging of the high k dielectric layer. One example of a capacitor stack device provided includes a high k dielectric layer of Ta2O5, a barrier layer of TaON or TiON formed at least in part by a remote plasma process, and a top electrode of TiN. The processes may be conducted at about 300 to 700° C. and are thus useful for low thermal budget applications. Also provided are MIM capacitor constructions and methods in which an insulator layer is formed by remote plasma oxidation of a bottom electrode.

Abstract: A process for forming high k dielectric thin films on a substrate, e.g., silicon, by 1) low temperature (500° C. or less) deposition of a dielectric material onto a surface, followed by 2) high temperature post-deposition annealing. The deposition can take place in an oxidative environment, followed by annealing, or alternatively the deposition can take place in a non-oxidative environment (e.g., N2), followed by oxidation and annealing.

Abstract: Provided is a method of integrating Ta2O5 into an MIS stack capacitor for a semiconductor device by forming a thin SiON layer at the Si/TaO interface using low temperature remote plasma oxidation anneal. Also provided is a method of forming an MIS stack capacitor with improved electrical performance by treating SiO2 with remote plasma nitridation or SiN layer with rapid thermal oxidation or RPO to form a SiON layer prior to Ta2O5 deposition with TAT-DMAE, TAETO or any other Ta-containing precursor.

Abstract: The formation of a barrier layer over a high k dielectric layer and deposition of a conducting layer over the barrier layer prevents intermigration between the species of the high k dielectric layer and the conducting layer and prevents oxygen scavenging of the high k dielectric layer. One example of a capacitor stack device provided includes a high k dielectric layer of Ta2O5, a barrier layer of TaON or TiON formed at least in part by a remote plasma process, and a top electrode of TiN. The processes may be conducted at about 300 to 700° C. and are thus useful for low thermal budget applications. Also provided are MIM capacitor constructions and methods in which an insulator layer is formed by remote plasma oxidation of a bottom electrode.

Abstract: The present invention provides a means for obtaining dielectric thin films on a substrate, e.g., silicon, by 1) low temperature (500° C. or less) deposition of a dielectric material onto a surface, followed by 2) high temperature post-deposition annealing. The deposition can take place in an oxidative environment, followed by annealing, or alternatively the deposition can take place in a non-oxidative environment (e.g., N2), followed by oxidation and annealing.

Abstract: A method of providing a stable interface between a metallic layer and a dielectric layer in a semiconductor device is provided. The method includes generating a remote nitrogen containing plasma and flowing activated nitrogen species, from the remote site to the location of the metallic layer. The activated nitrogen species are flowed over at least the surface of the metallic layer, where they react with the metallic surface to form a metal nitride. The treated layer can be used to provide a stable bottom electrode in a capacitor stack formation.

Abstract: A processing chamber cleaning method is described which utilizes microwave energy to remotely generate a reactive species to be used alone or in combination with an inert gas to remove deposits from a processing chamber. The reactive species can remove deposits from a first processing region at a first pressure and then remove deposits from a second processing region at a second pressure. Also described is a cleaning process utilizing remotely generated reactive species in a single processing region at two different pressures. Additionally, different ratios of reactive gas and inert gas may be utilized to improve the uniformity of the cleaning process, increase the cleaning rate, reduce recombination of reactive species and increase the residence time of reactive species provided to the processing chamber.

Abstract: A method and apparatus to control the deposition rate of a refractory metal film in a semiconductor fabrication process by controlling a quantity of ethylene present. The method includes placing a substrate in a deposition zone, of a semiconductor process chamber, flowing, into the deposition zone, a process gas including a refractory metal source, an inert carrier gas, and a hydrocarbon. Typically, the refractory metal source is tungsten hexafluoride, WF6, and the inert gas is argon, Ar. The ethylene may be premixed with either the argon or the tungsten hexafluoride to form a homogenous mixture. However, an in situ mixing apparatus may also be employed.

Abstract: An apparatus and process for limiting residue remaining after the etching of metal in a semiconductor manufacturing process, such as etching back a tungsten layer to form tungsten plugs, by passivating the surface of a wafer with a halogen-containing gas are disclosed. The wafer is exposed to the halogen-containing gas in a chamber before a metal layer is deposited on the wafer. The exposure can occur in the same chamber as the metal deposition, or a different chamber. The wafer can remain in the chamber or be moved to another chamber for etching after exposure and deposition.

Abstract: A multiple step chemical vapor deposition process for depositing a tungsten layer on a substrate. A first step of the deposition process includes a nucleation step in which WF.sub.6 and SiH.sub.4 are introduced into a deposition chamber. Next, the flow of WF.sub.6 and SiH.sub.4 are stopped and diborane is introduced into the chamber for between 5-25 seconds. Finally, during a bulk deposition step, the WF.sub.6 is reintroduced into the chamber along with H.sub.2 and B.sub.2 H.sub.6 flows to deposit a tungsten layer on the substrate. In a preferred embodiment, the bulk deposition step also introduces nitrogen into the process gas.

Abstract: An apparatus and process for limiting residue remaining after the etching of metal in a semiconductor manufacturing process, such as etching back a tungsten layer to form tungsten plugs, by passivating the surface of a wafer with a halogen-containing gas are disclosed. The wafer is exposed to the halogen-containing gas in a chamber before a metal layer is deposited on the wafer. The exposure can occur in the same chamber as the metal deposition, or a different chamber. The wafer can remain in the chamber or be moved to another chamber for etching after exposure and deposition.

Abstract: An apparatus and process for limiting residue remaining after the etching of metal in a semiconductor manufacturing process by injecting a halogen-containing gas without a plasma into a processing chamber. The wafer is then exposed to the remnants of the halogen-containing gas in the chamber before the metal is deposited on the wafer. The exposure can occur in the same chamber as the metal deposition, or a different chamber. The wafer can remain in the chamber or be moved to another chamber for etching after exposure and deposition.