Patents by Inventor Ravi Ranganathan

Ravi Ranganathan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11501733
    Abstract: The present disclosure is directed to systems and methods of transferring bulk data, such as OLED compensation mask data, generated by a source device to a sink device using a high-bandwidth embedded DisplayPort (eDP) connection contemporaneous with an ENABLED Panel Self-Refresh (PSR) mode. Upon ENABLING the PSR mode, the source control circuitry causes the source transmitter circuitry, the sink receiver circuitry, and the eDP high-bandwidth communication link to remain active rather than inactive. The source control circuitry generates one or more data transport units (DTUs) having a header portion that contains data indicative of the presence of a bulk data payload and the non-display status of the bulk data payload carried by the DTUs.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: November 15, 2022
    Assignee: Intel Corporation
    Inventors: Junhai Qiu, Ajit Joshi, Ravi Ranganathan, Perazhi Sameer Kalathil, Jun Jiang, Geethacharan Rajagopalan, Nandini Mahendran, Gary Smith
  • Publication number: 20200043440
    Abstract: The present disclosure is directed to systems and methods of transferring bulk data, such as OLED compensation mask data, generated by a source device to a sink device using a high-bandwidth embedded DisplayPort (eDP) connection contemporaneous with an ENABLED Panel Self-Refresh (PSR) mode. Upon ENABLING the PSR mode, the source control circuitry causes the source transmitter circuitry, the sink receiver circuitry, and the eDP high-bandwidth communication link to remain active rather than inactive. The source control circuitry generates one or more data transport units (DTUs) having a header portion that contains data indicative of the presence of a bulk data payload and the non-display status of the bulk data payload carried by the DTUs.
    Type: Application
    Filed: August 15, 2019
    Publication date: February 6, 2020
    Applicant: Intel Corporation
    Inventors: Junhai Qiu, Ajit Joshi, Ravi Ranganathan, Perazhi Sameer Kalathil, Jun Jiang, Geethacharan Rajagopalan, Nandini Mahendran, Gary Smith
  • Patent number: 10346561
    Abstract: A computer-implemented method for determining a system layout of a photovoltaic (PV) system is implemented by a design automation computer system in communication with a memory. The method includes receiving a first selection of a system table, receiving a layout mode designation, identifying a system orientation, identifying a system spacing, receiving a layout detail designation, and applying a layout algorithm based on the first selection of a system table, the layout mode designation, the layout mode designation, the system orientation, the system spacing and the layout detail designation.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: July 9, 2019
    Assignee: FTC Solar, Inc.
    Inventors: Andrew Joseph Morse, Nagendra Srinivas Cherukupalli, Ravi Ranganathan, Krishnan Ramagopal
  • Patent number: 10331805
    Abstract: A computer-implemented method for determining boundary offsets in a photovoltaic (PV) system based on shadow simulations is implemented by a design automation computer system in communication with a memory. The method includes identifying a set of obstructions wherein the set of obstructions includes a set of obstruction elevations and a set of obstruction offsets, simulating a set of shadow effects using a first coarse shadow algorithm based on the set of obstructions, refining the set of shadow effects using a second fine shadow algorithm based on the set of obstructions and the set of shadow effects, and defining a plurality of boundary of boundary offsets based on the refined set of shadow effects.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: June 25, 2019
    Assignee: FTC Solar, Inc.
    Inventors: Andrew Joseph Morse, Nagendra Srinivas Cherukupalli, Ravi Ranganathan, Krishnan Ramagopal
  • Patent number: 9922592
    Abstract: In one example, a method for controlling a display with a digital signal includes detecting a binary value from a timing controller, the binary value corresponding to a portion of an image to be displayed. The method can also include determining a previous binary value from the timing controller and calculating a difference between the binary value from the timing controller and the previous binary value from the timing controller. Furthermore, the method can include generating an encoded signal based on the difference and transmitting the encoded signal to a display panel.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: March 20, 2018
    Assignee: INTEL CORPORATION
    Inventors: Kunjal Parikh, Khaled Ahmed, Prakash K. Radhakrishnan, Peter L. Chang, Ravi Ranganathan
  • Publication number: 20170186366
    Abstract: In one example, a method for controlling a display with a digital signal includes detecting a binary value from a timing controller, the binary value corresponding to a portion of an image to be displayed. The method can also include determining a previous binary value from the timing controller and calculating a difference between the binary value from the timing controller and the previous binary value from the timing controller. Furthermore, the method can include generating an encoded signal based on the difference and transmitting the encoded signal to a display panel.
    Type: Application
    Filed: December 23, 2015
    Publication date: June 29, 2017
    Applicant: Intel Corporation
    Inventors: Kunjal Parikh, Khaled Ahmed, Prakash K. Radhakrishnan, Peter L. Chang, Ravi Ranganathan
  • Patent number: 9589079
    Abstract: A method for designing a photovoltaic (PV) system is implemented by a design automation computer system. The method includes receiving a set of site data, receiving a system type selection, receiving a plurality of system component selections, receiving a plurality of PV layout preferences, determining a PV module layout by iteratively applying a first layout algorithm to the set of site data and the plurality of PV layout preferences, the PV module layout defining a placement of a plurality of PV modules of a PV system, determining a structural layout, an electrical design, and an electrical layout based on the PV module layout, determining a bill of materials based on the PV module layout, the structural layout, and the electrical layout, and designing the PV system using the structural layout, the electrical design, the electrical layout, the PV module layout, and the bill of materials.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: March 7, 2017
    Assignee: SunEdison, Inc.
    Inventors: Andrew Joseph Morse, Nagendra Srinivas Cherukupalli, Ravi Ranganathan, Krishnan Ramagopal
  • Publication number: 20160275900
    Abstract: Methods and apparatus relating to adaptive partial screen update with dynamic backlight control capability are described. In an embodiment, logic causes retrieval of a full frame of content (to be displayed on a display device) based at least in part on an amount of partial screen change to be performed. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: December 28, 2013
    Publication date: September 22, 2016
    Inventors: Seh W. Kwa, Satyanarayana Avadhanam, Ravi Ranganathan
  • Publication number: 20160140258
    Abstract: A method for designing a photovoltaic (PV) system is implemented by a design automation computer system. The method includes receiving a set of site data, receiving a system type selection, receiving a plurality of system component selections, receiving a plurality of PV layout preferences, determining a PV module layout by iteratively applying a first layout algorithm to the set of site data and the plurality of PV layout preferences, the PV module layout defining a placement of a plurality of PV modules of a PV system, determining a structural layout, an electrical design, and an electrical layout based on the PV module layout, determining a bill of materials based on the PV module layout, the structural layout, and the electrical layout, and designing the PV system using the structural layout, the electrical design, the electrical layout, the PV module layout, and the bill of materials.
    Type: Application
    Filed: November 17, 2014
    Publication date: May 19, 2016
    Inventors: Andrew Joseph Morse, Nagendra Srinivas Cherukupalli, Ravi Ranganathan, Krishnan Ramagopal
  • Publication number: 20160140283
    Abstract: A computer-implemented method for determining a system layout of a photovoltaic (PV) system is implemented by a design automation computer system in communication with a memory. The method includes receiving a first selection of a system table, receiving a layout mode designation, identifying a system orientation, identifying a system spacing, receiving a layout detail designation, and applying a layout algorithm based on the first selection of a system table, the layout mode designation, the layout mode designation, the system orientation, the system spacing and the layout detail designation.
    Type: Application
    Filed: November 25, 2014
    Publication date: May 19, 2016
    Inventors: Andrew Joseph Morse, Nagendra Srinivas Cherukupalli, Ravi Ranganathan, Krishnan Ramagopal
  • Publication number: 20160140282
    Abstract: A computer-implemented method for determining boundary offsets in a photovoltaic (PV) system based on shadow simulations is implemented by a design automation computer system in communication with a memory. The method includes identifying a set of obstructions wherein the set of obstructions includes a set of obstruction elevations and a set of obstruction offsets, simulating a set of shadow effects using a first coarse shadow algorithm based on the set of obstructions, refining the set of shadow effects using a second fine shadow algorithm based on the set of obstructions and the set of shadow effects, and defining a plurality of boundary of boundary offsets based on the refined set of shadow effects.
    Type: Application
    Filed: November 25, 2014
    Publication date: May 19, 2016
    Inventors: Andrew Joseph Morse, Nagendra Srinivas Cherukupalli, Ravi Ranganathan, Krishnan Ramagopal
  • Patent number: 9141170
    Abstract: Techniques are described to monitor a level of graphics processing activity and control power usage based on the level. When no graphics processing activity is detected for a period of time, then a timing controller for a display device is instructed to capture a current image and repeatedly display the captured image. The graphics processing devices can be powered down. When graphics processing activity is detected, the graphics processing devices are powered up and the components used to capture an image and display the captured image are powered down.
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: September 22, 2015
    Assignee: Intel Corporation
    Inventors: Seh W. Kwa, Michael Calyer, Ravi Ranganathan, Narayan Biswal
  • Patent number: 9116697
    Abstract: Techniques are described to monitor a level of graphics processing activity and control power usage based on the level. When no graphics processing activity is detected for a period of time, then a timing controller for a display device is instructed to capture a current image and repeatedly display the captured image. The graphics processing devices can be powered down. When graphics processing activity is detected, the graphics processing devices are powered up and the components used to capture an image and display the captured image are powered down.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: August 25, 2015
    Assignee: Intel Corporation
    Inventors: Seh W. Kwa, Michael Calyer, Ravi Ranganathan, Narayan Biswal
  • Patent number: 9110665
    Abstract: Techniques are described to monitor a level of graphics processing activity and control power usage based on the level. When no graphics processing activity is detected for a period of time, then a timing controller for a display device is instructed to capture a current image and repeatedly display the captured image. The graphics processing devices can be powered down. When graphics processing activity is detected, the graphics processing devices are powered up and the components used to capture an image and display the captured image are powered down.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: August 18, 2015
    Assignee: Intel Corporation
    Inventors: Seh W. Kwa, Michael Calyer, Ravi Ranganathan, Narayan Biswal
  • Patent number: 8941592
    Abstract: Techniques are described to transmit commands to a display device during vertical or horizontal blanking intervals. The commands can be transmitted using fields that would otherwise be used to transmit color information. A Low Voltage Differential Signaling (LVDS) compliant interface can be used to transmit the commands.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: January 27, 2015
    Assignee: Intel Corporation
    Inventors: Seh W. Kwa, Ravi Ranganathan, Jun Shi, Maximino Vasquez
  • Patent number: 8823721
    Abstract: Techniques are described that can used to synchronize the start of frames from multiple sources so that when a display is to output a frame to a next source, boundaries of current and next source are aligned. Techniques are useful to avoid visual distortions when changing from a first video source to a second video source.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: September 2, 2014
    Assignee: Intel Corporation
    Inventors: Maximino Vasquez, Ravi Ranganathan, Seh W. Kwa, Todd M. Witter, Kyungtae Han, Paul S. Diefenbaugh
  • Patent number: 8743105
    Abstract: Techniques are described to monitor a level of graphics processing activity and control power usage based on the level. When no graphics processing activity is detected for a period of time, then a timing controller for a display device is instructed to capture a current image and repeatedly display the captured image. The graphics processing devices can be powered down. When graphics processing activity is detected, the graphics processing devices are powered up and the components used to capture an image and display the captured image are powered down.
    Type: Grant
    Filed: September 24, 2012
    Date of Patent: June 3, 2014
    Assignee: Intel Corporation
    Inventors: Seh W. Kwa, Michael Calyer, Ravi Ranganathan, Narayan Biswal
  • Publication number: 20140111531
    Abstract: Techniques are described to monitor a level of graphics processing activity and control power usage based on the level. When no graphics processing activity is detected for a period of time, then a timing controller for a display device is instructed to capture a current image and repeatedly display the captured image. The graphics processing devices can be powered down. When graphics processing activity is detected, the graphics processing devices are powered up and the components used to capture an image and display the captured image are powered down.
    Type: Application
    Filed: December 31, 2013
    Publication date: April 24, 2014
    Inventors: Seh W. Kwa, Michael Calyer, Ravi Ranganathan, Narayan Biswal
  • Publication number: 20140104286
    Abstract: Techniques are described to monitor a level of graphics processing activity and control power usage based on the level. When no graphics processing activity is detected for a period of time, then a timing controller for a display device is instructed to capture a. current image and repeatedly display the captured image. The graphics processing devices can be powered down. When graphics processing activity is detected, the graphics processing devices are powered up and the components used to capture an image and display the captured image are powered down.
    Type: Application
    Filed: December 27, 2013
    Publication date: April 17, 2014
    Inventors: Seh W. KWA, Michael Calyer, Ravi Ranganathan, Narayan Biswal
  • Publication number: 20140104290
    Abstract: Techniques are described to monitor a level of graphics processing activity and control power usage based on the level. When no graphics processing activity is detected for a period of time, then a timing controller for a display device is instructed to capture a current image and repeatedly display the captured image. The graphics processing devices can be powered down. When graphics processing activity is detected, the graphics processing devices are powered up and the components used to capture an image and display the captured image are powered down.
    Type: Application
    Filed: December 27, 2013
    Publication date: April 17, 2014
    Inventors: Seh W. KWA, Michael Calyer, Ravi Ranganathan, Narayan Biswal