Patents by Inventor Ravi Sankar Vunnam

Ravi Sankar Vunnam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10972001
    Abstract: Some embodiments include apparatuses having a switching circuit included in a buck converter; an output node; an inductor including a first portion having a first terminal coupled to the switching circuit, a second portion having a second terminal coupled to the output node, and a third terminal between the first and second portions; and a capacitor coupled to the second terminal, the second terminal to couple to a first additional capacitor, and the third terminal to couple to a second additional capacitor.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: April 6, 2021
    Assignee: Intel Corporation
    Inventors: Sameer Shekhar, Amit K. Jain, Ravi Sankar Vunnam
  • Publication number: 20200052583
    Abstract: Some embodiments include apparatuses having a switching circuit included in a buck converter; an output node; an inductor including a first portion having a first terminal coupled to the switching circuit, a second portion having a second terminal coupled to the output node, and a third terminal between the first and second portions; and a capacitor coupled to the second terminal, the second terminal to couple to a first additional capacitor, and the third terminal to couple to a second additional capacitor.
    Type: Application
    Filed: August 13, 2018
    Publication date: February 13, 2020
    Inventors: Sameer Shekhar, Amit K. Jain, Ravi Sankar Vunnam
  • Patent number: 9696350
    Abstract: Described is an apparatus having a non-linear control to manage power supply droop at an output of a voltage regulator. The apparatus comprises: a first inductor for coupling to a load; a capacitor, coupled to the first inductor, and for coupling to the load; a first high-side switch couple to the first inductor; a first low-side switch coupled to the first inductor; a bridge controller to control when to turn on and off the first high-side and first low-side switches; and a non-linear control (NLC) unit to monitor output voltage on the load, and to cause the bridge controller to turn on the first high-side switch and turn off the first low-side switch when a voltage droop is detected on the load.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: July 4, 2017
    Assignee: Intel Corporation
    Inventors: Edward A. Burton, Gerhard Schrom, Michael W. Rogers, Alexander Lyakhov, Ravi Sankar Vunnam, Jonathan P. Douglas, Fabrice Paillet, J. Keith Hodgson, William Dawson Kesling, Chiu Keung Tang, Narayanan Raghuraman, Narayanan Natarajan, Samie Samaan, George Geannopoulos
  • Patent number: 9252775
    Abstract: Described herein is a high-voltage level-shifter (HVLS) that can be used for both NMOS and PMOS bridges, exhibits a higher voltage tolerance for over-clocking than traditional level-shifters, has reduced crowbar current in its input driver, and no contention in its output driver. The HVLS comprises an input driver including a first signal conditioning unit, the input driver operating on a first power supply level and for conditioning an input signal as a first signal in the first signal conditioning unit; and a circuit to receive the first signal and to provide a second signal based at least in part on the first signal, the second signal being level-shifted from the first power supply level to a second power supply level, wherein the second power supply level is higher than the first power supply level.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: February 2, 2016
    Assignee: Intel Corporation
    Inventors: Gerhard Schrom, Ravi Sankar Vunnam
  • Patent number: 9046552
    Abstract: Described is an apparatus to trim on-die passive components. The apparatus comprises: a resistor-capacitor (RC) dominated oscillator independent of first order transistor speed dependency, wherein the RC dominated oscillator including one or more resistors and capacitors with programmable resistance and capacitance, and wherein the RC dominated oscillator to generate an output signal having a frequency depending substantially on values of the programmable resistance and capacitance; and a trim-able resistor or capacitor operable to be trimmed, for compensating process variations, according to a program code associated with the programmable resistance and capacitance of the RC dominated oscillator.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: June 2, 2015
    Assignee: Intel Corporation
    Inventors: Fabrice Paillet, Gerhard Schrom, Alexander Lyakhov, George L. Geannopoulos, Ravi Sankar Vunnam, J. Keith Hodgson
  • Publication number: 20140266119
    Abstract: Described is an apparatus having a non-linear control to manage power supply droop at an output of a voltage regulator. The apparatus comprises: a first inductor for coupling to a load; a capacitor, coupled to the first inductor, and for coupling to the load; a first high-side switch couple to the first inductor; a first low-side switch coupled to the first inductor; a bridge controller to control when to turn on and off the first high-side and first low-side switches; and a non-linear control (NLC) unit to monitor output voltage on the load, and to cause the bridge controller to turn on the first high-side switch and turn off the first low-side switch when a voltage droop is detected on the load.
    Type: Application
    Filed: May 31, 2013
    Publication date: September 18, 2014
    Inventors: Edward A. BURTON, Gerhard SCHROM, Michael W. ROGERS, Alexander LYAKHOV, Ravi Sankar VUNNAM, Jonathan P. DOUGLAS, Fabrice PAILLET, J. Keith HODGSON
  • Publication number: 20140266486
    Abstract: Described is an apparatus to trim on-die passive components. The apparatus comprises: a resistor-capacitor (RC) dominated oscillator independent of first order transistor speed dependency, wherein the RC dominated oscillator including one or more resistors and capacitors with programmable resistance and capacitance, and wherein the RC dominated oscillator to generate an output signal having a frequency depending substantially on values of the programmable resistance and capacitance; and a trim-able resistor or capacitor operable to be trimmed, for compensating process variations, according to a program code associated with the programmable resistance and capacitance of the RC dominated oscillator.
    Type: Application
    Filed: June 27, 2013
    Publication date: September 18, 2014
    Inventors: Fabrice PAILLET, Gerhard SCHROM, Alexander LYAKHOV, George L. GEANNOPOULOS, Ravi Sankar VUNNAM, J. Keith HODGSON
  • Publication number: 20140210517
    Abstract: Described herein is a high-voltage level-shifter (HVLS) that can be used for both NMOS and PMOS bridges, exhibits a higher voltage tolerance for over-clocking than traditional level-shifters, has reduced crowbar current in its input driver, and no contention in its output driver. The HVLS comprises an input driver including a first signal conditioning unit, the input driver operating on a first power supply level and for conditioning an input signal as a first signal in the first signal conditioning unit; and a circuit to receive the first signal and to provide a second signal based at least in part on the first signal, the second signal being level-shifted from the first power supply level to a second power supply level, wherein the second power supply level is higher than the first power supply level.
    Type: Application
    Filed: December 22, 2011
    Publication date: July 31, 2014
    Inventors: Gerhard Schrom, Ravi Sankar Vunnam