Abstract: A system comprising processing circuitry a memory storing instructions that cause the system to detect a code change to source code included in a code repository, identify a relationship between the code change and an associated product feature, determine one or more dependent product features impacted by the code change, select a set of test cases including a subset of test cases related to the associated product feature and a subset of test cases related to the one or more dependent product features, execute the set of test cases, and update the code-to-feature mapping using results of executing the set of test case.

Abstract: A system comprising processing circuitry a memory storing instructions that cause the system to detect a code change to source code included in a code repository, identify a relationship between the code change and an associated product feature, determine one or more dependent product features impacted by the code change, select a set of test cases including a subset of test cases related to the associated product feature and a subset of test cases related to the one or more dependent product features, execute the set of test cases, and update the code-to-feature mapping using results of executing the set of test case.

Abstract: A system comprising processing circuitry a memory storing instructions that cause the system to detect a code change to source code included in a code repository, identify a relationship between the code change and an associated product feature, determine one or more dependent product features impacted by the code change, select a set of test cases including a subset of test cases related to the associated product feature and a subset of test cases related to the one or more dependent product features, execute the set of test cases, and update the code-to-feature mapping using results of executing the set of test case.

Abstract: Systems which support an asymmetric link define rules and policies in each individual physical layer. An asymmetric link is a physical layer with a different number of transmit versus receive lanes. Asymmetric links enable physical layers to optimize performance, power, and system resources based on the required data bandwidth per direction across a link. Modern applications exhibit large demands for high memory bandwidth, i.e., more memory channels and larger bandwidth per channel. The utilization data, patterns) of link usage, and/or patterns) of lane usage may be gathered to exploit the facilities provided by asymmetric links. An engine includes AI-fueled analytics to monitor, orchestrate resources, and provide optimal routing, exploiting asymmetric links, lane polarity, and enqueue-dequeue in a computing ecosystem.

Abstract: Systems which support an asymmetric link define rules and policies in each individual physical layer. An asymmetric link is a physical layer with a different number of transmit versus receive lanes. Asymmetric links enable physical layers to optimize performance, power, and system resources based on the required data bandwidth per direction across a link. Modern applications exhibit large demands for high memory bandwidth, i.e., more memory channels and larger bandwidth per channel. The utilization data, patterns) of link usage, and/or patterns) of lane usage may be gathered to exploit the facilities provided by asymmetric links. An engine includes AI-fueled analytics to monitor, orchestrate resources, and provide optimal routing, exploiting asymmetric links, lane polarity, and enqueue-dequeue in a computing ecosystem.