Patents by Inventor Ravichandran Subrahmanyan

Ravichandran Subrahmanyan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6902658
    Abstract: A method of fabricating a field emission device cathode using electrophoretic deposition of carbon nanotubes in which a separate step of depositing a binder material onto a substrate, is performed prior to carbon nanotube particle deposition. First, a binder layer is deposited on a substrate from a solution containing a binder material. The substrate having the binder material deposited thereon is then transferred into a carbon nanotube suspension bath allowing for coating of the carbon nanotube particles onto the substrate. Thermal processing of the coating transforms the binder layer properties which provides for the adhesion of the carbon nanotube particles to the binder material.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: June 7, 2005
    Assignee: Motorola, Inc.
    Inventors: Albert Alec Talin, Kenneth Andrew Dean, Shawn M. O'Rourke, Bernard F. Coll, Matthew Stainer, Ravichandran Subrahmanyan
  • Publication number: 20030111946
    Abstract: A method of fabricating a field emission device cathode using electrophoretic deposition of carbon nanotubes in which a separate step of depositing a binder material onto a substrate, is performed prior to carbon nanotube particle deposition. First, a binder layer is deposited on a substrate from a solution containing a binder material. The substrate having the binder material deposited thereon is then transferred into a carbon nanotube suspension bath allowing for coating of the carbon nanotube particles onto the substrate. Thermal processing of the coating transforms the binder layer properties which provides for the adhesion of the carbon nanotube particles to the binder material.
    Type: Application
    Filed: December 18, 2001
    Publication date: June 19, 2003
    Inventors: Albert Alec Talin, Kenneth Andrew Dean, Shawn M. O'Rourke, Bernard F. Coll, Matthew Stainer, Ravichandran Subrahmanyan
  • Patent number: 6406926
    Abstract: A vacuum microelectronic device (10,40) is formed by applying a first conductor (13,14) to a substrate (11) and utilizing the first conductor (13,14) to expose a dielectric material (18) and a second conductive material (19) from a back surface of the substrate (11). A second conductor (29) and a dielectric (28) are formed from the second conductive material (19) and the dielectric material (18), respectively. This method self-aligns the dielectric (28) and the second conductor (29) with the first conductor (13,14). Electron emitters (31,33) of the vacuum microelectronic device (10,40) are formed on the first conductor (13,14).
    Type: Grant
    Filed: August 15, 2001
    Date of Patent: June 18, 2002
    Assignee: Motorola, Inc.
    Inventors: Shawn M. O'Rourke, Ravichandran Subrahmanyan
  • Patent number: 5587342
    Abstract: Interconnect bumps are formed on a circuit substrate using printing or dispensing techniques with a wet photoresist layer as a mask. A conductive paste is disposed in openings of a wet photoresist layer. The conductive paste is at least partially cured before the wet photoresist layer is removed. Alternatively, the wet photoresist layer may remain if it is a photo-imagable polyimide.
    Type: Grant
    Filed: April 3, 1995
    Date of Patent: December 24, 1996
    Assignee: Motorola, Inc.
    Inventors: Jong-Kai Lin, William H. Lytle, Ravichandran Subrahmanyan
  • Patent number: 5411400
    Abstract: A plurality of inserts (12) formed on a first substrate (11). A plurality of sockets (14) formed on a second substrate (13). Each socket of the plurality of sockets (14) on the second substrate (13) has a corresponding insert from the plurality of inserts (12) which physically aligns for coupling. At least one of the first (11) or second (13) substrates must be a semiconductor substrate. This arrangement allows for electrically connecting a semiconductor device or structure to another device for testing, burn-in, or final assembly.
    Type: Grant
    Filed: March 14, 1994
    Date of Patent: May 2, 1995
    Assignee: Motorola, Inc.
    Inventors: Ravichandran Subrahmanyan, Ravinder K. Sharma, William H. Lytle, Barry C. Johnson
  • Patent number: 5346857
    Abstract: A method for flip-chip bonding an integrated circuit die to a substrate. A substrate (21) having conductive bonding areas (22) coated with tin (23) is secured to a bottom end effector of a flip-chip bonding apparatus. An integrated circuit die (26) having gold bumps (28) is secured to a die tool of the flip-chip bonding apparatus. A gold-tin eutectic bond is formed between the integrated circuit die (26) and the conductive bonding areas (22) of the substrate (21).
    Type: Grant
    Filed: September 28, 1992
    Date of Patent: September 13, 1994
    Assignee: Motorola, Inc.
    Inventors: Thomas A. Scharr, Russell T. Lee, Ravichandran Subrahmanyan