Abstract: A mobile communications device includes at least two receivers and a memory module. The power consumption of the mobile communications device is controlled by selectively awakening and sleeping the receivers as needed to ensure that the desired quality of reception to check the control channel for messages from an associated base station and to handle incoming communications is maintained. The mobile communications device may operate in single receiver mode or dual receiver diversity mode. In the dual receiver diversity mode, the mobile communications device may switch between one of a number of diversity combining techniques based on the quality of reception.

Abstract: A reduced search symbol estimation algorithm includes a forward recursion, a backward recursion, and a combining step. To reduce complexity, during the forward and backward recursions, the number of survivor states retained at each stage is less than the total number of states of the trellis. The survivor states are selected from a group of candidate states, that are connected by branches to survivors from the previous stage of the recursion. The decoder compares the accumulated path metrics for each candidate state and retains a specified number of states that is less than the total possible number of states. For the forward recursion, the retained states or survivor states, denoted as Qk, are stored along with the corresponding state metrics. For the backward recursion, the retained states, denoted as Rk, are stored along with the corresponding state metrics.

Abstract: Combined equalization and decoding of codewords in a coded modulation symbol sequence that has been received from a channel is accomplished in a number of ways. In an intersymbol interference (ISI) cancellation technique, channel impulse response (CIR) estimates corresponding to each received symbol of the coded modulation symbol sequence are determined. Codeword k of the received symbol sequence is then decoded using a maximum likelihood decoding trellis with a path metric that depends upon the CIR estimates and that includes at least one term representing intersymbol interference resulting from symbols of previously decoded codewords. The decoding step is repeated until all of the codewords of the received coded modulation symbol sequence have been decoded.

Abstract: An important consideration in a coded modulation scheme is the choice of the component codes, which has a significant impact on the overall bit error rate performance and which determines the decoding complexity. Methods and apparatus employing product codes are described that can improve the performance of selected classes of information in the coded modulation scheme without affecting the decoding complexity or performance of other classes of information.

Abstract: A system and method for bidirectionally demodulating data symbols transmitted through a communication channel. The method includes sequentially receiving and storing a first plurality of known data symbols, a second plurality of unknown data symbols, and a third plurality of known data symbols. Thereafter, a first block of the unknown data symbols received nearer the first plurality of known data symbols is forward-demodulated. Likewise, a second block of the unknown data symbols received nearer the third plurality of known data symbols is backward-demodulated. The forward- and backward-demodulation of the unknown data symbols determines quality values (figure-of-merits based on at least one of signal power, noise power and a combination of signal power plus noise power) indicative of demodulation qualities of the unknown data symbols that are compared to produce a best direction indication.

Abstract: A low complexity, high performance trellis decoder adapts the complexity of the trellis decoding process based on a current condition of the communications system. A trellis structure of nodes and branches is developed to decode the sequence of symbols received over a communications channel. Each set of nodes in the trellis represents the possible values of a received symbol at one time instant. Each branch defines a specific transition between nodes at different time instants, and each branch has an associated branch metric or weight. A linkage of branches between the nodes and the trellis defines a path through the trellis that represents one possible symbol sequence, and an accumulated metric/weight is generated for each possible path through the trellis. A variable number M survivor paths through the trellis is determined based on their accumulated path metric/weights. The value of the variable M depends on the current condition of the communications system.

Abstract: Channel estimator circuitry and associated method for a digital receiver operates to estimate a channel impulse response of a transmission channel. When intersymbol interference is introduced upon a communication signal only by circuitry of a transmitter and a receiver, the quality of channel estimation is improved. Even when intersymbol interference is introduced upon a communication signal during its transmission, the quality of channel estimation is improved by decomposing the components of the intersymbol interference into portions introduced during transmission of the signal upon a communication channel and portions introduced by the transmitter and receiver circuitry.

Abstract: Delta sigma modulators for accepting input signals having amplitudes up to -1 dB of full-scale and a center frequency (F.sub.S) in the range ?F.sub.S /90, 44F 90!, and which are not prone to internal overflow, require few circuit parameters, and yield a signal transfer function with the inherent property that the modulator magnitude response is close to unity gain in the frequency region of interest include, in one embodiment, a pair of cascaded integrators, a unit delay element coupled to the output of the second integrator, an analog-to-digital (A/D) converter, and a one-bit digital-to-analog (D/A) converter controlled by output signals from the A/D converter. A first differential summing junction coupled to the output of the D/A converter is responsive to delta sigma modulator input signals. A second differential summing junction, coupled to the output of the first differential summing junction, is also coupled to receive a feedback signal from the second integrator.