Patents by Inventor Ravisangar Muniandy

Ravisangar Muniandy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • On-chip frequency degradation compensation
    Patent number: 7501845
    Abstract: Embodiments of the invention include a trio of reliability oscillators. In one embodiment, an on-chip frequency compensation circuit includes a selectively enabled reliability oscillator to generate a reference oscillating signal, a clocked reliability oscillator to generate an AC degraded oscillating signal, and a static reliability oscillator to generate a DC bias degraded oscillating signal. A compare circuit coupled to the reliability oscillators compares the oscillating signals and generates a frequency compensation signal if the comparison determines that there is frequency degradation greater than a predetermined threshold.
    Type: Grant
    Filed: April 7, 2008
    Date of Patent: March 10, 2009
    Assignee: Intel Corporation
    Inventors: Ravisangar Muniandy, Gregory F. Taylor, Payman Aminzadeh
  • On-chip frequency degradation compensation
    Publication number: 20080252329
    Abstract: Embodiments of the invention include a trio of reliability oscillators. In one embodiment, an on-chip frequency compensation circuit includes a selectively enabled reliability oscillator to generate a reference oscillating signal, a clocked reliability oscillator to generate an AC degraded oscillating signal, and a static reliability oscillator to generate a DC bias degraded oscillating signal. A compare circuit coupled to the reliability oscillators compares the oscillating signals and generates a frequency compensation signal if the comparison determines that there is frequency degradation greater than a predetermined threshold.
    Type: Application
    Filed: April 7, 2008
    Publication date: October 16, 2008
    Inventors: Ravisangar Muniandy, Gregory F. Taylor, Payman Aminzadeh
  • On-chip frequency degradation compensation
    Patent number: 7394274
    Abstract: Embodiments of the invention include a trio of reliability oscillators. In one embodiment, an on-chip frequency compensation circuit includes a selectively enabled reliability oscillator to generate a reference oscillating signal, a clocked reliability oscillator to generate an AC degraded oscillating signal, and a static reliability oscillator to generate a DC bias degraded oscillating signal. A compare circuit coupled to the reliability oscillators compares the oscillating signals and generates a frequency compensation signal if the comparison determines that there is frequency degradation greater than a predetermined threshold.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: July 1, 2008
    Assignee: Intel Corporation
    Inventors: Ravisangar Muniandy, Gregory F. Taylor, Payman Aminzadeh
  • On-chip frequency degradation compensation
    Publication number: 20070257697
    Abstract: Embodiments of the invention include a trio of reliability oscillators. In one embodiment, an on-chip frequency compensation circuit includes a selectively enabled reliability oscillator to generate a reference oscillating signal, a clocked reliability oscillator to generate an AC degraded oscillating signal, and a static reliability oscillator to generate a DC bias degraded oscillating signal. A compare circuit coupled to the reliability oscillators compares the oscillating signals and generates a frequency compensation signal if the comparison determines that there is frequency degradation greater than a predetermined threshold.
    Type: Application
    Filed: July 17, 2007
    Publication date: November 8, 2007
    Inventors: Ravisangar Muniandy, Gregory Taylor, Payman Aminzadeh
  • On-chip frequency degradation compensation
    Patent number: 7282937
    Abstract: Embodiments of the invention include a trio of reliability oscillators. In one embodiment, an on-chip frequency compensation circuit includes a selectively enabled reliability oscillator to generate a reference oscillating signal, a clocked reliability oscillator to generate an AC degraded oscillating signal, and a static reliability oscillator to generate a DC bias degraded oscillating signal. A compare circuit coupled to the reliability oscillators compares the oscillating signals and generates a frequency compensation signal if the comparison determines that there is frequency degradation greater than a predetermined threshold.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: October 16, 2007
    Assignee: Intel Corporation
    Inventors: Ravisangar Muniandy, Gregory F. Taylor, Payman Aminzadeh
  • On-chip frequency degradation compensation
    Publication number: 20050140418
    Abstract: Embodiments of the invention include a trio of reliability oscillators. In one embodiment, an on-chip frequency compensation circuit includes a selectively enabled reliability oscillator to generate a reference oscillating signal, a clocked reliability oscillator to generate an AC degraded oscillating signal, and a static reliability oscillator to generate a DC bias degraded oscillating signal. A compare circuit coupled to the reliability oscillators compares the oscillating signals and generates a frequency compensation signal if the comparison determines that there is frequency degradation greater than a predetermined threshold.
    Type: Application
    Filed: December 31, 2003
    Publication date: June 30, 2005
    Inventors: Ravisangar Muniandy, Gregory Taylor, Payman Aminzadeh