Patents by Inventor Ray Askew

Ray Askew has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory controller hub interface
    Patent number: 7327370
    Abstract: A memory controller hub includes a graphics subsystem adapted to perform graphics operations on data, and interface circuitry adapted selectively to couple the graphics subsystem to a local memory through electrical connectors and to couple the memory controller hub to a graphics controller through the electrical connectors.
    Type: Grant
    Filed: July 6, 2005
    Date of Patent: February 5, 2008
    Assignee: Intel Corporation
    Inventors: Brian D. Possley, David M. Puffer, Kurt B. Robinson, Ray Askew, James S. Chapple, Thomas E. Dever, II
  • Memory controller hub interface
    Patent number: 7116331
    Abstract: A memory controller hub includes a graphics subsystem adapted to perform graphics operations on data, and interface circuitry adapted selectively to couple the graphics subsystem to a local memory through electrical connectors and to couple the memory controller hub to a graphics controller through the electrical connectors.
    Type: Grant
    Filed: August 23, 2000
    Date of Patent: October 3, 2006
    Assignee: Intel Corporation
    Inventors: Brian D. Possley, David M. Puffer, Kurt B. Robinson, Ray Askew, James S. Chapple, Thomas E. Dever, II
  • Memory controller hub interface
    Publication number: 20050243096
    Abstract: A memory controller hub includes a graphics subsystem adapted to perform graphics operations on data, and interface circuitry adapted selectively to couple the graphics subsystem to a local memory through electrical connectors and to couple the memory controller hub to a graphics controller through the electrical connectors.
    Type: Application
    Filed: July 6, 2005
    Publication date: November 3, 2005
    Inventors: Brian Possley, David Puffer, Kurt Robinson, Ray Askew, James Chapple, Thomas Dever
  • Magnetic and electric shielding of on-board devices
    Patent number: 6566596
    Abstract: Improved electromagnetic compatibility for integrated motherboard or device board designs is provided by magnetic shielding, electric shielding, or both integrated into the chip packaging materials. Motherboard emissions may be reduced by use of the shielding. A nonconductive primary and tertiary layer sandwich a high-conductivity metal secondary layer forming a Faraday cage for electric field shielding. A nonconductive primary layer is covered by a tertiary layer formed of a composite having permeable material for magnetic shielding. The tertiary layer formed of a composite could include a high permeability particulate ferrous material. Both the secondary layer and the tertiary layer formed of a composite could be used for both electric and magnetic shielding of chips.
    Type: Grant
    Filed: December 29, 1997
    Date of Patent: May 20, 2003
    Assignee: Intel Corporation
    Inventor: Ray Askew
  • Grid array mounting arrangements
    Publication number: 20030047348
    Abstract: Grid array mounting arrangements, including apparatus (sub-arrays, arrays, electronic components, systems) and methods.
    Type: Application
    Filed: September 10, 2001
    Publication date: March 13, 2003
    Inventors: Rebecca Jessep, Ray Askew, Daryl Sato, Jeff Krieger, Phil Geng
  • Electric shielding of on-board devices
    Patent number: 6350951
    Abstract: Improved electromagnetic compatibility for integrated motherboard or device board designs is provided by magnetic shielding, electric shielding, or both integrated into the chip packaging materials. Motherboard emissions may be reduced by use of the shielding. A nonconductive primary and tertiary layer sandwich a high-conductivity metal secondary layer forming a Faraday cage for electric field shielding. A nonconductive primary layer is covered by a tertiary layer formed of a composite having permeable material for magnetic shielding. The tertiary layer formed of a composite could include a high permeability particulate ferrous material. Both the secondary layer and the tertiary layer formed of a composite could be used for both electric and magnetic shielding of chips.
    Type: Grant
    Filed: December 29, 1997
    Date of Patent: February 26, 2002
    Assignee: Intel Corporation
    Inventor: Ray Askew