Patents by Inventor Ray Ma

Ray Ma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210115196
    Abstract: Anthropogenic derivatives of native lignin are disclosed, having specific viscoelastic metrics which selectively facilitate the processing of these lignin derivatives into particular finished products. Such lignin derivatives are characterized by rheological metrics that include minimum storage modulus (G?min), onset of softening temperature (T1), and/or cross-over temperature (T2) from predominately viscous to predominately elastic behaviour.
    Type: Application
    Filed: December 22, 2020
    Publication date: April 22, 2021
    Inventors: John Frank Kadla, Ray Ma, James Ian DALLMEYER
  • Publication number: 20180248977
    Abstract: A method includes receiving a first query instruction input from a first client device via a graphical user interface, wherein the first client device is subscribed to a first channel of a plurality of channels. The method further includes receiving a plurality of messages from a second client device, wherein each message of the plurality of messages is associated with the channel. The method further includes generating a first filtered subset of the plurality of messages by applying the first query instruction input to the plurality of messages for the channel as the plurality of messages is received. The method further includes providing the first filtered subset of the plurality of messages to the first client device to be displayed via the graphical user interface.
    Type: Application
    Filed: February 22, 2018
    Publication date: August 30, 2018
    Inventors: Gabriel Leydon, Francois Orsini, Steven Brooks, Winnie Tseng-Mueller, Boaz Sedan, Cynthia Chu, Dmitry Bragin, Mick Ryan, Anton Koinov, Sarit Arcushin-Yaakobovitz, Ray Ma
  • Patent number: 8927308
    Abstract: Systems, and methods for the design and fabrication of OLEDs, including large-area OLEDs with metal bus lines, are provided. For a given panel area dimension, target luminous emittance, OLED device structure and efficiency (as given by the JVL characteristics of an equivalent small area pixel), and electrical resistivity and thickness of the bus line material and electrode onto which the bus lines are disposed, a bus line pattern may be designed such that Fill Factor (FF), Luminance Uniformity (U) and Power Loss (PL) may be optimized. One general design objective may be to maximize FF, maximize U and minimize PL. Another approach may be, for example, to define minimum criteria for U and a maximum criteria for PL, and then to optimize the bus line layout to maximize FF. OLED panels including bus lines with different resistances (R1) along a length of the bus line are also described.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: January 6, 2015
    Assignee: Universal Display Corporation
    Inventors: Huiqing Pang, Peter Levermore, Emory Krall, Kamala Rajan, Ruiqing (Ray) Ma, Paul E. Burrows
  • Patent number: 8432095
    Abstract: Systems and methods for the design and fabrication of OLEDs, including high-performance large-area OLEDs, are provided. Variously described fabrication processes may be used to deposit and pattern bus lines with a smooth profile and a gradual sidewall transition. Such smooth profiles may, for example, reduce the probability of electrical shorting at the bus lines. Accordingly, in certain circumstances, an insulating layer may no longer be considered essential, and may be optionally avoided altogether. In cases where an insulating layer is not used, further enhancements in the emissive area and shelf life of the device may be achieved as well. According to aspects of the invention, bus lines such as those described herein may be deposited, and patterned, using vapor deposition such as vacuum thermal evaporation (VTE) through a shadow mask, and may avoid multiple photolithography steps.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: April 30, 2013
    Assignee: Universal Display Corporation
    Inventors: Huiqing Pang, Peter Levermore, Kamala Rajan, Emory Krall, Ruiqing (Ray) Ma, Paul E. Burrows
  • Publication number: 20120286298
    Abstract: Systems, and methods for the design and fabrication of OLEDs, including large-area OLEDs with metal bus lines, are provided. Various bus line design rules for large area OLED light panels may include mathematical models developed to optimize bus line design and/or layout on large area OLED light panels. For a given panel area dimension, target luminous emittance, OLED device structure and efficiency (as given by the JVL characteristics of an equivalent small area pixel), and electrical resistivity and thickness of the bus line material and electrode onto which the bus lines are disposed, a bus line pattern may be designed such that Fill Factor (FF), Luminance Uniformity (U) and Power Loss (PL) may be optimized. One general design objective may be to maximize FF, maximize U and minimize PL. Another approach may be, for example, to define minimum criteria for U and a maximum criteria for PL, and then to optimize the bus line layout to maximize FF.
    Type: Application
    Filed: May 12, 2011
    Publication date: November 15, 2012
    Applicant: Universal Display Corporation
    Inventors: Huiqing Pang, Peter Levermore, Emory Krall, Kamala Rajan, Ruiqing (Ray) Ma, Paul E. Burrows
  • Publication number: 20120286648
    Abstract: Systems and methods for the design and fabrication of OLEDs, including high-performance large-area OLEDs, are provided. Variously described fabrication processes may be used to deposit and pattern bus lines with a smooth profile and a gradual sidewall transition. Such smooth profiles may, for example, reduce the probability of electrical shorting at the bus lines. Accordingly, in certain circumstances, an insulating layer may no longer be considered essential, and may be optionally avoided altogether. In cases where an insulating layer is not used, further enhancements in the emissive area and shelf life of the device may be achieved as well. According to aspects of the invention, bus lines such as those described herein may be deposited, and patterned, using vapor deposition such as vacuum thermal evaporation (VTE) through a shadow mask, and may avoid multiple photolithography steps.
    Type: Application
    Filed: May 11, 2011
    Publication date: November 15, 2012
    Applicant: Universal Display Corporation
    Inventors: Huiqing Pang, Peter Levermore, Kamala Rajan, Emory Krall, Ruiqing (Ray) Ma, Paul E. Burrows
  • Patent number: 3959598
    Abstract: A circuit for making existing automatic number identification (ANI) equipment in a telephone central office compatible with multifrequency tone telephone using tone-to-pulse converters. In a typical ANI system, the telephone of one party on a two-party line includes an identification circuit, such as a connection to ground, while the other telephone does not include such a connection. When one party initiates a call, the tone-to-pulse converter interrupts the direct line pair connection between the telephone and the central office, in order to convert the multifrequency tones generated by the telephone into corresponding pulses recognizable by the central office. During this period, a voltage comparator in the preferred embodiment of the identification forwarding circuit serves to detect the voltage condition of the line pair portion connected to the one telephone, which condition varies depending on the presence or absence of the connection to ground in the telephone.
    Type: Grant
    Filed: April 15, 1974
    Date of Patent: May 25, 1976
    Assignee: Tel-Tone Corporation
    Inventors: Daniel R. Asmussen, Ray Ma