Abstract: A vehicle control device includes a plurality of IC units, while maintaining the operational reliability. The vehicle control device includes an IC unit for performing image processing on outputs from cameras; an IC unit for performing recognition processing of an external environment of the vehicle; and an IC unit for performing judgment processing for cruise control of the vehicle. A control flow is provided so as to allow the IC unit to transmit a control signal to the IC units and. The control flow is provided separately from a data flow configured to transmit the output from the cameras, the image data, and the external environment data.

Abstract: A vehicle control device includes: a signal processing IC unit that outputs image processing data; a recognition processing IC unit that performs recognition processing of the external environment of a vehicle to output external environment data obtained through the recognition processing; a judgment processing IC unit that performs judgment processing for cruise control of the vehicle; a power management unit capable of controlling an on or off state of a recognition function of the external environment of the vehicle in the recognition processing IC unit according to the conditions of the vehicle; and a bypass path for enabling data communications from the signal processing IC unit to the judgment processing IC unit without performing the recognition processing of the external environment of the vehicle by the recognition processing IC unit.

Abstract: A signal processing IC unit performs image processing with respect to an output from a camera. A recognition processing IC unit performs recognition processing based on the output from the signal processing IC unit. A control IC unit outputs a control signal based on the output from the recognition processing IC unit. A first terminal is electrically connected to the recognition processing IC unit. A second terminal is electrically connected to the control IC unit. The signal processing IC unit, the recognition processing IC unit, and the control IC unit are disposed on a board. The first terminal and the second terminal are provided on an edge portion of the board.

Abstract: A vehicle control device includes a plurality of IC units, while maintaining the operational reliability. The vehicle control device includes an IC unit for performing image processing on outputs from cameras; an IC unit for performing recognition processing of an external environment of the vehicle; and an IC unit for performing judgment processing for cruise control of the vehicle. A control flow is provided so as to allow the IC unit to transmit a control signal to the IC units and. The control flow is provided separately from a data flow configured to transmit the output from the cameras, the image data, and the external environment data.

Abstract: A vehicle control device includes: a signal processing IC unit that outputs image processing data; a recognition processing IC unit that performs recognition processing of the external environment of a vehicle to output external environment data obtained through the recognition processing; a judgment processing IC unit that performs judgment processing for cruise control of the vehicle; a power management unit capable of controlling an on or off state of a recognition function of the external environment of the vehicle in the recognition processing IC unit according to the conditions of the vehicle; and a bypass path for enabling data communications from the signal processing IC unit to the judgment processing IC unit without performing the recognition processing of the external environment of the vehicle by the recognition processing IC unit.

Abstract: A vehicle control device includes: a signal processing integrated circuit (IC) unit for performing image processing on an output from a camera mounted in a vehicle and outputting image data obtained through the image processing; a recognition processing IC unit provided as another unit different from the signal processing IC unit, for performing recognition processing for recognizing an external environment of the vehicle based on the image data received from the signal processing IC unit and outputting external environment data obtained through the recognition processing; and a judgment IC unit provided as another unit different from the signal processing IC unit and the recognition processing IC unit, for performing judgment processing for cruise control of the vehicle based on the external environment data received from the recognition processing IC unit and outputting a cruise control signal based on the judgment processing result.

Abstract: A plurality of first cameras are provided in a vehicle so as to surround the vehicle. A plurality of second cameras are provided in the vehicle so as to surround the vehicle. A control unit performs a first operation of outputting a control signal for cruise control of the vehicle based on both outputs from the plurality of the first cameras and outputs from the plurality of the second cameras, a second operation of outputting the control signal based on the outputs from the plurality of the first cameras, and a third operation of outputting the control signal based on the outputs from the plurality of the second cameras.

Abstract: A signal processing IC unit performs image processing with respect to an output from a camera. A recognition processing IC unit performs recognition processing based on the output from the signal processing IC unit. A control IC unit outputs a control signal based on the output from the recognition processing IC unit. A first terminal is electrically connected to the recognition processing IC unit. A second terminal is electrically connected to the control IC unit. The signal processing IC unit, the recognition processing IC unit, and the control IC unit are disposed on a board. The first terminal and the second terminal are provided on an edge portion of the board.

Abstract: A method of controlling an operating mode of at least one processing module. The method comprises receiving an indication of the execution of at least one background task by the at least one processing module, aggregating an execution duration for the at least one background task on the at least one processing module, and configuring a lower power mode for the at least one processing module when the at least one background task is allocated to the at least one processing module for execution thereon if the aggregated execution duration for the at least one background task exceeds a threshold duration within an evaluation period.

Abstract: A technique for providing end-to-end error detection coding between a requesting module and a memory module have been disclosed. A method includes translating a first logical address of a memory request to a physical address. The method includes translating an error control code and data associated with the memory request between a first format and a second format. The error control code and data having the first format is generated based on the first logical address. The error control code and data having the second format is generated based on a second address. The method includes generating an error indicator based on the error control code, the data, and one of the first logical address and the second address.

Abstract: An electronic device comprising a clock unit and a processing unit connected to the clock unit is described. The clock unit may deliver an output clock signal for operating the processing unit in accordance with the output clock signal. The clock unit may have: a normal mode in which the output clock signal has a low amount of jitter and a normal clock rate to enable normal use of the electronic device, and a failure analysis mode in which the output clock signal has a high amount of jitter or a reduced clock rate, or a high amount of jitter combined with a reduced clock rate, to impede the normal use. The clock unit may be protected against unauthorized re-activation of the normal mode. A method of protecting an electronic device against unauthorized use is also described.

Abstract: The invention relates to an apparatus for transfer of data elements between a bus controller, such as a CPU, and a memory controller. An address translator is arranged to receive a write address from the CPU, to modify the write address and to send the modified write address to the memory controller. An ECC calculator is arranged to receive write input data associated with the write address, from the CPU, and to generate an error correction code on the basis of the write input data. A concatenator is arranged to receive the write input data from the CPU, and to receive the error correction code from the ECC calculator, and to concatenate the write input data and the error correction code to obtain write output data, and to send the write output data to the memory controller.

Abstract: An electronic device comprising a clock unit and a processing unit connected to the clock unit is described. The clock unit may deliver an output clock signal for operating the processing unit in accordance with the output clock signal. The clock unit may have: a normal mode in which the output clock signal has a low amount of jitter and a normal clock rate to enable normal use of the electronic device, and a failure analysis mode in which the output clock signal has a high amount of jitter or a reduced clock rate, or a high amount of jitter combined with a reduced clock rate, to impede the normal use. The clock unit may be protected against unauthorized re-activation of the normal mode. A method of protecting an electronic device against unauthorized use is also described.

Abstract: A detector circuit for detecting the presence of a remote capacitive sensor having at least two terminals connected via a protection circuit that includes one or more capacitors, the detector circuit comprising: a current supply for changing the charge on the sensor and the protection circuit, a detector for measuring the voltage on one or more of the terminals; wherein the presence of the sensor is determined by changing the charge on the capacitive sensor and the one or more capacitors of the protection circuit in a predetermined manner such that the voltage measurement on the one or more terminals when the sensor is present is significantly different than when the sensor is absent.

Abstract: A microcontroller device comprising a receiver component configured to receive a one or more reset signals for the microcontroller device; an identification component configured to identify a source of the or each reset signals received by the receiver component; a time interval determining component configured to determine a length of a time interval in accordance with the identified source of the or each reset signals received by the receiver component; a voltage setting component configured to set a voltage of an output of the microcontroller device to a first value on receipt of a reset signal by the receiver component; and a control component configured to maintain the voltage of the output at the first value for the duration of the determined length of the time interval; and set the voltage of the output to a second value on substantial completion of the determined length of the time interval.

Abstract: A microprocessor may include a logic circuit for executing instructions of a data processing application. The microprocessor may have a timer system which includes a clock counter connected to a clock input for receiving a clock signal and counting a number of cycles of the clock signal. A clock comparator may be connected the clock counter and to a timer register in which a timer reference value can be stored. The clock comparator may compare a number of cycles of the clock signal with the timer reference value and generate a timer signal based on the comparison. The timer system may have a timer output for outputting timer signal. The timer system may include a control input for receiving a digital value representing a measured value of a sensed parameter of a device and a control register in which a control reference value can be stored. A control comparator may be connected the control input.

Abstract: A telescoping adjustable pivot sliding hinge system, for mounting a door with at least a portion of the side edge of the door projecting into the opening when the door is in an open position, is disclosed. An upper mounting plate is mounted onto the door's top edge and is fastened to the door's interior side. First and second guide tracks are installed onto the header of the door opening. The upper mounting plate includes a pair of guide members that are operatively moveably engaged respectively with the first and second guide tracks. A lower mounting plate is mounted on a lower horizontal surface of the door opening, and includes a lower guide track and a telescoping adjustable pivot arm that is horizontally and rotationally captured at a proximal end thereof by the lower mounting plate. The lower mounting plate can be adjusted in relation to the base plate, and can be locked permanently with the said base plate by two machine screws and two nuts.

Abstract: A top corner connector is provided for a shower enclosure or tub/shower enclosure. The connector includes first and second legs which have an interior cavity opening downwardly and opening lengthwise at the end. Each leg is adapted to receive a portion of a header at the top of the enclosure. The corner connector and headers can be secured together and at least the corner connector can be secured to the top end of a vertical corner post at a corner of the enclosure. A method is provided for efficiently connecting the headers at the top of the enclosure with the corner connector.

Abstract: A microcontroller device comprising a receiver component configured to receive a one or more reset signals for the microcontroller device; an identification component configured to identify a source of the or each reset signals received by the receiver component; a time interval determining component configured to determine a length of a time interval in accordance with the identified source of the or each reset signals received by the receiver component; a voltage setting component configured to set a voltage of an output of the microcontroller device to a first value on receipt of a reset signal by the receiver component; and a control component configured to maintain the voltage of the output at the first value for the duration of the determined length of the time interval; and set the voltage of the output to a second value on substantial completion of the determined length of the time interval.

Abstract: A microprocessor may include a logic circuit for executing instructions of a data processing application. The microprocessor may have a timer system which includes a clock counter connected to a clock input for receiving a clock signal and counting a number of cycles of the clock signal. A clock comparator may be connected the clock counter and to a timer register in which a timer reference value can be stored. The clock comparator may compare a number of cycles of the clock signal with the timer reference value and generate a timer signal based on the comparison. The timer system may have a timer output for outputting timer signal. The timer system may include a control input for receiving a digital value representing a measured value of a sensed parameter of a device and a control register in which a control reference value can be stored. A control comparator may be connected the control input.