Patents by Inventor Raya Leviathan

Raya Leviathan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system to provide user-level multithreading
    Patent number: 10635438
    Abstract: A method and system to provide user-level multithreading are disclosed. The method according to the present techniques comprises receiving programming instructions to execute one or more shared resource threads (shreds) via an instruction set architecture (ISA). One or more instruction pointers are configured via the ISA; and the one or more shreds are executed simultaneously with a microprocessor, wherein the microprocessor includes multiple instruction sequencers.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: April 28, 2020
    Assignee: Intel Corporation
    Inventors: Edward Grochowski, Hong Wang, John P. Shen, Perry H. Wang, Jamison D. Collins, James Held, Partha Kundu, Raya Leviathan, Tin-Fook Ngai
  • Method and system to provide user-level multithreading
    Patent number: 10628153
    Abstract: A method and system to provide user-level multithreading are disclosed. The method according to the present techniques comprises receiving programming instructions to execute one or more shared resource threads (shreds) via an instruction set architecture (ISA). One or more instruction pointers are configured via the ISA; and the one or more shreds are executed simultaneously with a microprocessor, wherein the microprocessor includes multiple instruction sequencers.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: April 21, 2020
    Assignee: Intel Corporation
    Inventors: Edward Grochowski, Hong Wang, John P. Shen, Perry H. Wang, Jamison D. Collins, James Held, Partha Kundu, Raya Leviathan, Tin-Fook Ngai
  • Method and system to provide user-level multithreading
    Patent number: 10613858
    Abstract: A method and system to provide user-level multithreading are disclosed. The method according to the present techniques comprises receiving programming instructions to execute one or more shared resource threads (shreds) via an instruction set architecture (ISA). One or more instruction pointers are configured via the ISA; and the one or more shreds are executed simultaneously with a microprocessor, wherein the microprocessor includes multiple instruction sequencers.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: April 7, 2020
    Assignee: Intel Corporation
    Inventors: Edward Grochowski, Hong Wang, John P. Shen, Perry H. Wang, Jamison D. Collins, James Held, Partha Kundu, Raya Leviathan, Tin-Fook Ngai
  • Method and system to provide user-level multithreading
    Patent number: 10585667
    Abstract: A method and system to provide user-level multithreading are disclosed. The method according to the present techniques comprises receiving programming instructions to execute one or more shared resource threads (shreds) via an instruction set architecture (ISA). One or more instruction pointers are configured via the ISA; and the one or more shreds are executed simultaneously with a microprocessor, wherein the microprocessor includes multiple instruction sequencers.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: March 10, 2020
    Assignee: Intel Corporation
    Inventors: Edward Grochowski, Hong Wang, John P. Shen, Perry H. Wang, Jamison D. Collins, James Held, Partha Kundu, Raya Leviathan, Tin-Fook Ngai
  • METHOD AND SYSTEM TO PROVIDE USER-LEVEL MULTITHREADING
    Publication number: 20180321936
    Abstract: A method and system to provide user-level multithreading are disclosed. The method according to the present techniques comprises receiving programming instructions to execute one or more shared resource threads (shreds) via an instruction set architecture (ISA). One or more instruction pointers are configured via the ISA; and the one or more shreds are executed simultaneously with a microprocessor, wherein the microprocessor includes multiple instruction sequencers.
    Type: Application
    Filed: April 2, 2018
    Publication date: November 8, 2018
    Inventors: Edward Grochowski, Hong Wang, John P. Shen, Perry H. Wang, Jamison D. Collins, James Held, Partha Kundu, Raya Leviathan, Tin-Fook Ngai
  • METHOD AND SYSTEM TO PROVIDE USER-LEVEL MULTITHREADING
    Publication number: 20180307484
    Abstract: A method and system to provide user-level multithreading are disclosed. The method according to the present techniques comprises receiving programming instructions to execute one or more shared resource threads (shreds) via an instruction set architecture (ISA). One or more instruction pointers are configured via the ISA; and the one or more shreds are executed simultaneously with a microprocessor, wherein the microprocessor includes multiple instruction sequencers.
    Type: Application
    Filed: February 20, 2018
    Publication date: October 25, 2018
    Inventors: Ed Grochowski, Hong Wang, John P. Shen, Perry H. Wang, Jamison D. Collins, James Held, Partha Kundu, Raya Leviathan, Tin-Fook Ngai
  • METHOD AND SYSTEM TO PROVIDE USER-LEVEL MULTITHREADING
    Publication number: 20180225118
    Abstract: A method and system to provide user-level multithreading are disclosed. The method according to the present techniques comprises receiving programming instructions to execute one or more shared resource threads (shreds) via an instruction set architecture (ISA). One or more instruction pointers are configured via the ISA; and the one or more shreds are executed simultaneously with a microprocessor, wherein the microprocessor includes multiple instruction sequencers.
    Type: Application
    Filed: April 2, 2018
    Publication date: August 9, 2018
    Inventors: Ed Grochowski, Hong Wang, John P. Shen, Perry H. Wang, Jamison D. Collins, James Held, Partha Kundu, Raya Leviathan, Tin-Fook Ngai
  • METHOD AND SYSTEM TO PROVIDE USER-LEVEL MULTITHREADING
    Publication number: 20180225117
    Abstract: A method and system to provide user-level multithreading are disclosed. The method according to the present techniques comprises receiving programming instructions to execute one or more shared resource threads (shreds) via an instruction set architecture (ISA). One or more instruction pointers are configured via the ISA; and the one or more shreds are executed simultaneously with a microprocessor, wherein the microprocessor includes multiple instruction sequencers.
    Type: Application
    Filed: April 2, 2018
    Publication date: August 9, 2018
    Inventors: Ed Grochowski, Hong Wang, John P. Shen, Perry H. Wang, Jamison D. Collins, James Held, Partha Kundu, Raya Leviathan, Tin-Fook Ngai
  • Method and system to provide user-level multithreading
    Patent number: 9952859
    Abstract: A method and system to provide user-level multithreading are disclosed. The method according to the present techniques comprises receiving programming instructions to execute one or more shared resource threads (shreds) via an instruction set architecture (ISA). One or more instruction pointers are configured via the ISA; and the one or more shreds are executed simultaneously with a microprocessor, wherein the microprocessor includes multiple instruction sequencers.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: April 24, 2018
    Assignee: Intel Corporation
    Inventors: Ed Grochowski, Hong Wang, John P. Shen, Perry H. Wang, Jamison D. Collins, James Held, Partha Kundu, Raya Leviathan, Tin-Fook Ngai
  • Method and system to provide user-level multithreading
    Patent number: 9442721
    Abstract: A method and system to provide user-level multithreading are disclosed. The method according to the present techniques comprises receiving programming instructions to execute one or more shared resource threads (shreds) via an instruction set architecture (ISA). One or more instruction pointers are configured via the ISA; and the one or more shreds are executed simultaneously with a microprocessor, wherein the microprocessor includes multiple instruction sequencers.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: September 13, 2016
    Assignee: Intel Corporation
    Inventors: Edward T. Grochowski, Hong Wang, John P. Shen, Perry H. Wang, Jamison D. Colins, James P. Held, Partha Kundu, Raya Leviathan, Tin-Fook Ngai
  • METHOD AND SYSTEM TO PROVIDE USER-LEVEL MULTITHREADING
    Publication number: 20160216971
    Abstract: A method and system to provide user-level multithreading are disclosed. The method according to the present techniques comprises receiving programming instructions to execute one or more shared resource threads (shreds) via an instruction set architecture (ISA). One or more instruction pointers are configured via the ISA; and the one or more shreds are executed simultaneously with a microprocessor, wherein the microprocessor includes multiple instruction sequencers.
    Type: Application
    Filed: March 31, 2016
    Publication date: July 28, 2016
    Inventors: Ed Grochowski, Hong Wang, John P. Shen, Perry H. Wang, Jamison D. Collins, James Held, Partha Kundu, Raya Leviathan, Tin-Fook Ngai
  • Method and system to provide concurrent user-level, non-privileged shared resource thread creation and execution
    Patent number: 9189230
    Abstract: A method and system to provide user-level multithreading are disclosed. The method according to the present techniques comprises receiving programming instructions to execute one or more shared resource threads (shreds) via an instruction set architecture (ISA). One or more instruction pointers are configured via the ISA; and the one or more shreds are executed simultaneously with a microprocessor, wherein the microprocessor includes multiple instruction sequencers.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: November 17, 2015
    Assignee: Intel Corporation
    Inventors: Edward T. Grochowski, Hong Wang, John P. Shen, Perry H. Wang, Jamison D. Collins, James P. Held, Partha Kundu, Raya Leviathan, Tin-Fook Ngai
  • METHOD AND SYSTEM TO PROVIDE USER-LEVEL MULTITHREADING
    Publication number: 20130111194
    Abstract: A method and system to provide user-level multithreading are disclosed. The method according to the present techniques comprises receiving programming instructions to execute one or more shared resource threads (shreds) via an instruction set architecture (ISA). One or more instruction pointers are configured via the ISA; and the one or more shreds are executed simultaneously with a microprocessor, wherein the microprocessor includes multiple instruction sequencers.
    Type: Application
    Filed: December 20, 2012
    Publication date: May 2, 2013
    Inventors: Ed Grochowski, Hong Wang, John P. Shen, Perry H. Wang, Jamison D. Colins, James Held, Partha Kundu, Raya Leviathan, Tin-Fook Ngai
  • Method and system to provide user-level multithreading
    Publication number: 20050223199
    Abstract: A method and system to provide user-level multithreading are disclosed. The method according to the present techniques comprises receiving programming instructions to execute one or more shared resource threads (shreds) via an instruction set architecture (ISA). One or more instruction pointers are configured via the ISA; and the one or more shreds are executed simultaneously with a microprocessor, wherein the microprocessor includes multiple instruction sequencers.
    Type: Application
    Filed: March 31, 2004
    Publication date: October 6, 2005
    Inventors: Edward Grochowski, Hong Wang, John Shen, Perry Wang, Jamison Collins, James Held, Partha Kundu, Raya Leviathan, Tin-Fook Ngai