Abstract: A method and system for use in controlling an electric network are provided. The system includes an Integrated Volt-VAr Control (IVVC) component configured to determine optimization parameters for slow dynamics electromechanical devices and fast dynamics DER devices coupled to the network. The slow dynamics devices are controlled by a present state of the electric network and a voltage rise table that is adaptively updated in real-time using a command output, or a power flow-based complete optimization routine that generates optimal setpoints for the traditional controllable assets and for at least some of the fast dynamics DER devices. The fast dynamics devices are controlled locally using a control algorithm that uses a reactive power contribution based on IVVC settings, based on photo-voltaic (PV) plant active power variations, based on power factor, or based on a voltage of the local electric network.

Abstract: Method and system to provide co-optimized utilization of demand response and energy storage resources in an electrical grid system. The system may include a module to evaluate a marginal savings relative to a dispatch cost, if a demand response event is performed. The system may further include a module to evaluate a marginal savings relative to the dispatch cost, if an energy storage event is performed, and a controller including circuitry may be configured to determine a control strategy to perform a dispatch including a demand response event and/or an energy storage event, based at least in part on the respective marginal savings of the demand response event and/or the energy storage event, which may be selected to co-optimize an integrated utilization of the demand response and energy storage resources to meet a given objective.

Abstract: A method and system for use in controlling an electric network are provided. The system includes an Integrated Volt-VAr Control (IVVC) component configured to determine optimization parameters for slow dynamics electromechanical devices and fast dynamics DER devices coupled to the network. The slow dynamics devices are controlled by a present state of the electric network and a voltage rise table that is adaptively updated in real-time using a command output, or a power flow-based complete optimization routine that generates optimal setpoints for the traditional controllable assets and for at least some of the fast dynamics DER devices. The fast dynamics devices are controlled locally using a control algorithm that uses a reactive power contribution based on IVVC settings, based on photo-voltaic (PV) plant active power variations, based on power factor, or based on a voltage of the local electric network.

Abstract: A method for forming a tileable detector array is presented.

Abstract: Method and system to provide co-optimized utilization of demand response and energy storage resources in an electrical grid system. The system may include a module to evaluate a marginal savings relative to a dispatch cost, if a demand response event is performed. The system may further include a module to evaluate a marginal savings relative to the dispatch cost, if an energy storage event is performed, and a controller including circuitry may be configured to determine a control strategy to perform a dispatch including a demand response event and/or an energy storage event, based at least in part on the respective marginal savings of the demand response event and/or the energy storage event, which may be selected to co-optimize an integrated utilization of the demand response and energy storage resources to meet a given objective.

Abstract: A modular and tileable sensor array with routing in the interposer carrying the signals from the sensors to the integrated circuits. In one embodiment a large area modular sensor array assembly includes one or more tileable modules coupled together. The tileable modules have a plurality of transducer cells forming a sensor, an interposer coupled on a first side to the plurality of transducer cells by a plurality, one or more integrated circuits coupled to a second side of the interposer, wherein the interposer is configured to form the connection of at least some of the transducer cells to the integrated circuits, and one or more input/output connectors coupled to the interposer and providing an external interface.

Abstract: A method for forming a tileable detector array is presented.

Abstract: An ultrasound imaging system (100). An exemplary system (100) includes a plurality of transducer elements (136) formed in subarrays (140) and a plurality of subarray circuit units (160?), with each circuit unit (160?) connected to a subarray (140) of the transducer elements (136). The circuitry in each unit (160?) comprises a plurality of integrated circuits (330, 340, 350), with at least a first (340) of the integrated circuits formed over a second (330) of the integrated circuits in a stacked configuration. In an example illustration the first integrated circuit (340) includes a first plurality of first bond pads (345) along a surface (342) thereof and the second integrated circuit (330) includes a second plurality of second bond pads (335) along a surface (331) thereof, with bond wires (344) extending between pairs of first and second bond pads to provide input/output signal connections therebetween.

Abstract: A modular and tileable sensor array with routing in the interposer carrying the signals from the sensors to the integrated circuits. In one embodiment a large area modular sensor array assembly includes one or more tileable modules coupled together. The tileable modules have a plurality of transducer cells forming a sensor, an interposer coupled on a first side to the plurality of transducer cells by a plurality, one or more integrated circuits coupled to a second side of the interposer, wherein the interposer is configured to form the connection of at least some of the transducer cells to the integrated circuits, and one or more input/output connectors coupled to the interposer and providing an external interface.

Abstract: An ultrasonic monitoring system is formed with a probe unit. In one example an array of transducer cells is arranged in rows and columns formed along a first plane with a first pitch along a first direction. An integrated circuit including an array of circuit cells is formed along a second plane parallel to the first plane. The circuit cells are spaced apart along the first direction at a second pitch smaller than the first pitch. A first of the transducer cells is vertically aligned, along a direction normal to one of the planes, with a first of the circuit cells and having a connection thereto. A second of the transducer cells is offset from vertical alignment with respect to the position of a second circuit cell so as to not overlie the second circuit cell.

Abstract: Methods of fabricating a tiled transducer array are disclosed. Embodiments of the methods include fabricating a wafer comprising a plurality of transducers, dicing the wafer to form individual transducers, testing the individual transducers to identify a plurality of known good transducers, preparing a substrate having a front side and a backside wherein the backside of the substrate comprises a plurality of connectors, positioning the plurality of known good transducers on the front side of the substrate and aligning the plurality of transducers in a horizontal direction and a vertical direction to form a transducer array, and electrically coupling the connectors on the substrate to the plurality of known good transducers, wherein the connectors are arranged such that each of the plurality of known good transducers may be electrically coupled to an electronic device disposed on the backside of the substrate, through a respective one or more of the plurality of connectors.

Abstract: An ultrasound imaging system (100). An exemplary system (100) includes a plurality of transducer elements (136) formed in subarrays (140) and a plurality of subarray circuit units (160?), with each circuit unit (160?) connected to a subarray (140) of the transducer elements (136). The circuitry in each unit (160?) comprises a plurality of integrated circuits (330, 340, 350), with at least a first (340) of the integrated circuits formed over a second (330) of the integrated circuits in a stacked configuration. In an example illustration the first integrated circuit (340) includes a first plurality of first bond pads (345) along a surface (342) thereof and the second integrated circuit (330) includes a second plurality of second bond pads (335) along a surface (331) thereof, with bond wires (344) extending between pairs of first and second bond pads to provide input/output signal connections therebetween.

Abstract: An ultrasound imaging system (100). An exemplary system (100) includes a plurality of transducer elements (136) formed in subarrays (140) and a plurality of subarray circuit units (160?), with each circuit unit (160?) connected to a subarray (140) of the transducer elements (136). The circuitry in each unit (160?) comprises a plurality of integrated circuits (330, 340, 350), with at least a first (340) of the integrated circuits formed over a second (330) of the integrated circuits in a stacked configuration. In an example illustration the first integrated circuit (340) includes a first plurality of first bond pads (345) along a surface (342) thereof and the second integrated circuit (330) includes a second plurality of second bond pads (335) along a surface (331) thereof, with bond wires (344) extending between pairs of first and second bond pads to provide input/output signal connections therebetween.

Abstract: A stacked electronics module comprises a first layer including a first substrate having a front side and a backside, a first electrical interconnect layer disposed on the first substrate and a first electronic device disposed on the front side of the first substrate. In addition, the stacked electronics module comprises a second layer including a second substrate having a front side and a backside, a second electrical interconnect layer disposed on the second substrate and a second electronic device disposed on the front side of the second substrate.

Abstract: An ultrasound monitoring system. In one embodiment, an array of transducer cells is formed along a first plane and an integrated circuit structure, formed along a second plane parallel to the first plane, includes an array of circuit cells. A connector provides electrical connections between the array of transducer cells and the array of circuit cells, and an interconnection structure is connected to transfer signals between the circuit cells and processing and control circuitry. The integrated circuit structure includes a semiconductor substrate and a plurality of conductive through-die vias formed through the substrate to provide Input/Output (I/O) connections between the transducer cells and the interconnection structure. The monitoring system may be configured as an imaging system and the processing and control circuitry may be external to the probe unit.

Abstract: The present invention relates to a method for making an integrated sensor comprising providing a sensor array fabricated on a top surface of a bulk silicon wafer having a top surface and a bottom surface, and comprising a plurality of sensors fabricated on the top surface of the bulk silicon wafer. The method further comprises coupling an SOI wafer to the top surface of the bulk silicon wafer, thinning the back surface of the bulk silicon wafer, coupling a plurality of integrated circuit die to the back surface of the bulk silicon wafer, and removing the SOI wafer from the top surface of the bulk silicon wafer.

Abstract: A modular sensor assembly and methods of fabricating a modular sensor assembly are provided. The modular sensor assembly includes a sensor array coupled to an electronics array in a stacked configuration. The sensor array comprises a plurality of sensor modules, each comprising a plurality of sensor sub-arrays. The electronics array comprises a plurality of integrated circuit modules, each comprising a plurality of integrated circuit chips. The sensor modules may be coupled to the electronics modules via flip chip technology.

Abstract: An ultrasonic monitoring system is formed with a probe unit. In one example an array of transducer cells is arranged in rows and columns formed along a first plane with a first pitch along a first direction. An integrated circuit including an array of circuit cells is formed along a second plane parallel to the first plane. The circuit cells are spaced apart along the first direction at a second pitch smaller than the first pitch. A first of the transducer cells is vertically aligned, along a direction normal to one of the planes, with a first of the circuit cells and having a connection thereto. A second of the transducer cells is offset from vertical alignment with respect to the position of a second circuit cell so as to not overlie the second circuit cell.

Abstract: A reconfigurable linear array of sensors (e.g., optical, thermal, pressure, ultrasonic). The reconfigurability allows the size and spacing of the sensor elements to be a function of the distance from the beam center. This feature improves performance for imaging systems having a limited channel count. The improved performance, for applications in which multiple transmit focal zones are employed, arises from the ability to adjust the aperture for a particular depth.

Abstract: An imaging system is disclosed that includes a first imaging panel and a second imaging panel disposed about an imaging volume. The imaging panels may be configured to image the entire imaging volume and may include panels using any form of acoustic or electromagnetic energy such as ultrasound panels, optical panels, electrical impedance panels, field emitter/x-ray detector panels, or a combination thereof. In one embodiment, a first group of sensors are included in a 2D matrix of sensors configured to transmit ultrasound through the imaging volume to a second group of sensors included in a second 2D matrix of sensors and vice versa. In a second embodiment the system may further include a second imaging system having a transmitter, a receiver, or both, disposed adjacent the first imaging panel, the second imaging panel, or both. A third embodiment may include at least one additional imaging panel.