Abstract: A metal processing method includes etching to remove material from a thin metal part. A pattern of etch resistant material is used to prevent etching of the metal in desired locations. The etch resistant material is intentionally applied to unclean surfaces so that an adhesion between the etch resistant material and the metal will fail during the etching process. An edge is formed during etching at the boundaries of the pattern of the etch resistant material. These edges are rounded where the adhesion fails. A shaver foil is produced using the described metal processing method including a face side, a cutter side and a plurality of whisker holes. A face edge is formed where an etched profile of the whisker hole meets the face side and a cutter edge is formed where the etched profile of the whisker hole meets the cutter side. The face edge is rounded using the aforementioned process and the cutter edge is sharp using a conventional etch resistant material application method.

Abstract: A high-density interconnection device or connector (1) that is formed with wafer in a stacked arrangement. The stack of wafers (20) is arranged to include signal wafers (20b) that alternate with shield wafers (20a). A dielectric coating (40) is applied to at least one body surface of one or more of the wafer to prevent electrical bridging between the adjacent signal and shield wafers (20a, 20b), e.g. when conductive debris is lodged between the wafers (20).

Abstract: A metal processing method includes etching to remove material from a thin metal part. A pattern of etch resistant material is used to prevent etching of the metal in desired locations. The etch resistant material is intentionally applied to unclean surfaces so that an adhesion between the etch resistant material and the metal will fail during the etching process. An edge is formed during etching at the boundaries of the pattern of the etch resistant material. These edges are rounded where the adhesion fails. A shaver foil is produced using the described metal processing method including a face side, a cutter side and a plurality of whisker holes. A face edge is formed where an etched profile of the whisker hole meets the face side and a cutter edge is formed where the etched profile of the whisker hole meets the cutter side. The face edge is rounded using the aforementioned process and the cutter edge is sharp using a conventional etch resistant material application method.

Abstract: A double sided electrical connection flexible circuit particularly useful as a substrate for an area array integrated package, and the method of fabricating the structure is described. A circuit having interconnections on one surface and solder ball contact pads on the second surface are interconnected by copper plated from a single surface in order to avoid entrapment of air pockets. In one embodiment, the conductive vias are formed from a copper film which extends from the solder ball contact pads, which may be indented, providing a well for solder balls in the contact pad.

Abstract: A gasket is provided as a substitute for metal dambars during a process of encapsulating an integrated circuit chip package. The gasket can be in the form of a straight strip for sealing one side of the lead frame or a structure which corresponds in shape and dimension to the entire perimeter of the lead frame. The gasket has grooves formed therein which are defined by projections between adjacent grooves. The depth of each groove is slightly greater than a thickness of the leads. When the gasket is compressed prior to injection of an encapsulation material, the gasket material deforms such that the projections sealingly fill the spaces between leads and the cross-sectional shape of each groove is substantially the same as the cross-sectional shape of the respective lead disposed within the groove.

Abstract: A gasket is provided as a substitute for metal dambars during a process of encapsulating an integrated circuit chip package. The gasket can be in the form of a straight strip for sealing one side of the lead frame or a structure which corresponds in shape and dimension to the entire perimeter of the lead frame. The gasket has grooves formed therein which are defined by projections between adjacent grooves. The depth of each groove is slightly greater than a thickness of the leads. When the gasket is compressed prior to injection of an encapsulation material, the gasket material deforms such that the projections sealingly fill the spaces between leads and the cross-sectional shape of each groove is substantially the same as the cross-sectional shape of the respective lead disposed within the groove.

Abstract: A method and apparatus for encapsulating an integrated circuit die and leadframe assembly using dambarless leadframes. Dambarless leadframe 191 is formed having leads 193 that are widened in the region near the package edge such that the interlead spacing between adjacent leads is less than a predetermined minimum distance. Lower and upper mold release films 67 and 65 are stretched over a plurality of die cavities formed in bottom and top mold chases 179 and 173. The release films can be further stretched into the die cavities by a vacuum. Leadframe strip assemblies containing the dambarless leadframes, each holding integrated circuit dies 189, are placed such that the integrated circuit dies are each centered over a bottom mold die cavity 63 and over the bottom mold release films 65.

Abstract: A gasket is provided as a substitute for metal dambars during a process of encapsulating an integrated circuit chip package. The gasket can be in the form of a straight strip for sealing one side of the lead frame or a structure which corresponds in shape and dimension to the entire perimeter of the lead frame. The gasket has grooves formed therein which are defined by projections between adjacent grooves. The depth of each groove is slightly greater than a thickness of the leads. When the gasket is compressed prior to injection of an encapsulation material, the gasket material deforms such that the projections sealingly fill the spaces between leads and the cross-sectional shape of each groove is substantially the same as the cross-sectional shape of the respective lead disposed within the groove.

Abstract: The invention is a method which deliberately applies exaggerated features (22,32) on the photo-image used to pattern the lead frame for etching. The resulting etched leads (20,25,29) will have a flat to concave shape at the end of the lead tips (23,26,30), which can be used to "self-center" wire bond paths, eliminating the slung wire tendency altogether, provided the wire path crosses the lead tip within the concave shape region.

Abstract: A method and apparatus for encapsulating an integrated circuit die and leadframe assembly using dambarless leadframes. Dambarless leadframe 191 is formed having leads 193 that are widened in the region near the package edge such that the interlead spacing between adjacent leads is less than a predetermined minimum distance. Lower and upper mold release films 67 and 65 are stretched over a plurality of die cavities formed in bottom and top mold chases 179 and 173. The release films can be further stretched into the die cavities by a vacuum. Leadframe strip assemblies containing the dambarless leadframes, each holding integrated circuit dies 189 are placed such that the integrated circuit dies are each centered over a bottom mold die cavity 63 and over the bottom mold release films 65.

Abstract: The invention is to a semiconductor package and the method of making the package. A moisture resistant coating such as a ceramic material is applied over a plastic packaged semiconductor device to seal the package from moisture.

Abstract: This invention relates to lead flames upon which chips (A or B) are mounted prior to encapsulation during IC device packaging. A lead frame structure (6) for manufacturing an IC device comprises a lead frame base (1) including a plurality of leads (10) and four first tie bar portions (16) extending toward a die pad aperture (17). A die pad (2) forms a cross-shaped mounting surface (20) for receiving a chip (30), wherein the mounting surface (20) is smaller than the chip (30), such that perimeter surfaces of the chip (30) are substantially exposed when the chip (30) is mounted on the mounting surface (20). Four second tie bar portions (21) extend from the mounting surface (20) and correspond to the four first tie bar portions (16). The die pad (2) is affixed to the lead frame base (1) and positioned in the aperture (17) by affixing each of the first tie bar portions (16) to a corresponding one of the second tie bar portions (21).

Abstract: This invention relates to lead frames upon which chips are mounted prior to encapsulation. A lead frame structure (6) for manufacturing an IC device comprises a lead frame base (1) including a plurality of leads (10) and four first tie bar portions (16) extending toward a die pad aperture (17). A die pad (2) forms a mounting surface (20) for receiving a chip (30) and includes four second tie bar portions (21) extending from the mounting surface (20) and corresponding to the four first tie bar portions (16). The die pad (2) is affixed to the lead frame base (1) and positioned in the aperture (17) by affixing each of the second tie bar portions (21) to a corresponding one of the first tie bar portions (16).

Abstract: This invention relates to lead frames upon which chips (A or B) are mounted prior to encapsulation during IC device packaging. A lead frame structure (6) for manufacturing an IC device comprises a lead frame base (1) including a plurality of leads (10) and four first tie bar portions (16) extending toward a die pad aperture (17). A die pad (2) forms a cross-shaped mounting surface (20) for receiving a chip (30), wherein the mounting surface (20) is smaller than the chip (30), such that perimeter surfaces of the chip (30) are substantially exposed when the chip (30) is mounted on the mounting surface (20). Four second tie bar portions (21) extend from the mounting surface (20) and correspond to the four first tie bar portions (16). The die pad (2) is affixed to the lead frame base (1) and positioned in the aperture (17) by affixing each of the first tie bar portions (16) to a corresponding one of the second tie bar portions (21).

Abstract: The invention is to a semiconductor package and the method of making the package. A moisture resistant coating such as a ceramic, silica or other plastic material is applied over a plastic packaged semiconductor device to seal the package from moisture.

Abstract: A method is provided of making a thin film solar cell comprising depositing solar cell material on a substrate using an ionized gas stream for transporting and applying solar cell material to the substrate.

Abstract: An integrated circuit lead frame is configured so that it may be die stamped to cut lead frame leads to customize it for a particular semiconductor device bar size. Lead frame leads are cut at a specified distance from the lead frame bar pad so that a semiconductor device bar which is larger than the bar pad may be mounted on the bar pad and cut segments of lead frame leads that are attached to the bar pad.

Abstract: A process for plating beryllium copper with an excellent electrically conductive material such as gold for use in high reliability applications wherein a heat treating step is employed after forming to yield a desired hardness spring temper comprising the steps of: providing a copper-rich surface on the beryllium copper; electroplating the copper-rich surface with a diffusion barrier preplate; heat treating the beryllium copper material to a desired temper; and electroplating the material with a high electrically conductive material. This process provides for a void-free, durable gold plate which can be produced by a continuous automated strip plating line before and after heat treating.