Abstract: Cognitive analysis using applied analog circuits including receiving, by a circuit, a first set of data results and a second set of data results; charging a first capacitor on the circuit with a first unit of charge for each of the first set of data results that indicates a positive data point; charging a second capacitor on the circuit with a second unit of charge for each of the second set of data results that indicates a positive data point; applying a charge from the first capacitor and a charge from the second capacitor to an analog unit of the circuit; and generating a signal on a circuit output indicating that a ratio of the positive data points in the first set of data results to the positive data points in the second set of data results is greater than a statistical significance.

Abstract: Real time cognitive monitoring of correlations between variables including receiving, by a circuit, a first set of data results and a second set of data results, wherein each set of data results comprises binary data points; adding a unit of charge to a collection capacitor on the circuit for each of the first set of data results that indicates a positive data point; removing a unit of charge from the collection capacitor for each of the second set of data results that indicates a positive data point; and triggering a first sense amp on the circuit if the charge on the collection capacitor exceeds a high charge threshold, indicating that the positive data points in the first set of data results is greater than the positive data points in the second set of data results to a first statistical significance.

Abstract: Real time cognitive monitoring of correlations between variables including receiving, by a circuit, a first set of data results and a second set of data results, wherein each set of data results comprises binary data points; adding a unit of charge to a collection capacitor on the circuit for each of the first set of data results that indicates a positive data point; removing a unit of charge from the collection capacitor for each of the second set of data results that indicates a positive data point; and triggering a first sense amp on the circuit if the charge on the collection capacitor exceeds a high charge threshold, indicating that the positive data points in the first set of data results is greater than the positive data points in the second set of data results to a first statistical significance.

Abstract: A method and apparatus to adjust a differential transmitter output impedance is disclosed. Output voltage is sampled and averaged to mitigate noise and leakage. Averaged uplevel and downlevel voltages are used to select a number of pullup devices and a number of pulldown devices to control the differential transmitter output impedance to match a distal termination resistance or a transmission line impedance.

Abstract: A method and apparatus to adjust a differential transmitter output impedance is disclosed. Output voltage is sampled and averaged to mitigate noise and leakage. Averaged uplevel and downlevel voltages are used to select a number of pullup devices and a number of pulldown devices to control the differential transmitter output impedance to match a distal termination resistance or a transmission line impedance.

Abstract: Cognitive analysis using applied analog circuits including receiving, by a circuit, a first set of data results and a second set of data results; charging a first capacitor on the circuit with a first unit of charge for each of the first set of data results that indicates a positive data point; charging a second capacitor on the circuit with a second unit of charge for each of the second set of data results that indicates a positive data point; applying a charge from the first capacitor and a charge from the second capacitor to an analog unit of the circuit; and generating a signal on a circuit output indicating that a ratio of the positive data points in the first set of data results to the positive data points in the second set of data results is greater than a statistical significance.

Abstract: A method and circuit are provided for implementing enhanced CMOS inverter based optical Transimpedance Amplifiers (TIAs). A transimpedence amplifier (TIA) includes a photo-detector, and the TIA is formed by a first TIA inverter and a second TIA inverter. The first TIA inverter has an input from a cathode side of the photo-detector and the second inverter has an input from an anode side of the photo-detector. A replica TIA is formed by two replica inverters, coupled to a respective input to a first operational amplifier and a second operational amplifier. The first operational amplifier and the second operational amplifier have a feedback configuration for respectively regulating a set voltage level at the cathode side of the photo-detector input of the first inverter and at the anode side of the photo-detector input of the second inverter.

Abstract: A circuit component comprises a row of transistors. The row may contain a first active FET with a source region and a drain region. The row may also contain a first active dummy FET that shares the source region and that also has a diffusion region. The row may also contain a second active FET and a second active dummy FET, positioned such that the active dummy FETs are located between the active FETs on the row. The row may also have an end positioned such that the first active dummy FET is between the end and the first active FET. A supply of current may be electrically connected to the source diffusion regions. A load region may be electrically connected to the drain region. The first active FET and the first active dummy FET may have gates that share a voltage source or that have their own voltage source.

Abstract: Cognitive analysis using applied analog circuits including receiving, by a circuit, a first set of data results and a second set of data results; charging a first capacitor on the circuit with a first unit of charge for each of the first set of data results that indicates a positive data point; charging a second capacitor on the circuit with a second unit of charge for each of the second set of data results that indicates a positive data point; applying a charge from the first capacitor and a charge from the second capacitor to an analog unit of the circuit; and generating a signal on a circuit output indicating that a ratio of the positive data points in the first set of data results to the positive data points in the second set of data results is greater than a statistical significance.

Abstract: Real time cognitive monitoring of correlations between variables including receiving, by a circuit, a first set of data results and a second set of data results, wherein each set of data results comprises binary data points; adding a unit of charge to a collection capacitor on the circuit for each of the first set of data results that indicates a positive data point; removing a unit of charge from the collection capacitor for each of the second set of data results that indicates a positive data point; and triggering a first sense amp on the circuit if the charge on the collection capacitor exceeds a high charge threshold, indicating that the positive data points in the first set of data results is greater than the positive data points in the second set of data results to a first statistical significance.

Abstract: Cognitive analysis using applied analog circuits including receiving, by a circuit, a first set of data results and a second set of data results; charging a first capacitor on the circuit with a first unit of charge for each of the first set of data results that indicates a positive data point; charging a second capacitor on the circuit with a second unit of charge for each of the second set of data results that indicates a positive data point; applying a charge from the first capacitor and a charge from the second capacitor to an analog unit of the circuit; and generating a signal on a circuit output indicating that a ratio of the positive data points in the first set of data results to the positive data points in the second set of data results is greater than a statistical significance.

Abstract: Real time cognitive monitoring of correlations between variables including receiving, by a circuit, a first set of data results and a second set of data results, wherein each set of data results comprises binary data points; adding a unit of charge to a collection capacitor on the circuit for each of the first set of data results that indicates a positive data point; removing a unit of charge from the collection capacitor for each of the second set of data results that indicates a positive data point; and triggering a first sense amp on the circuit if the charge on the collection capacitor exceeds a high charge threshold, indicating that the positive data points in the first set of data results is greater than the positive data points in the second set of data results to a first statistical significance.

Abstract: Certain aspects of the present disclosure are directed to a circuit for driving a signal at an output node. The circuit generally includes a voltage divider network having a first terminal coupled to the output node. The circuit also includes a first transistor having a gate coupled to a second terminal of the voltage divider network and a plurality of transistors. A gate of each of the plurality of transistors may be coupled to a respective tap node of the voltage divider network, and the plurality of transistors may include a third transistor having a source coupled to a drain of the first transistor. The circuit may also include a second transistor coupled to the first transistor and having a gate coupled to an input node of the circuit.

Abstract: Certain aspects of the present disclosure are directed to a circuit for driving a signal at an output node. The circuit generally includes a voltage divider network having a first terminal coupled to the output node. The circuit also includes a first transistor having a gate coupled to a second terminal of the voltage divider network and a plurality of transistors. A gate of each of the plurality of transistors may be coupled to a respective tap node of the voltage divider network, and the plurality of transistors may include a third transistor having a source coupled to a drain of the first transistor. The circuit may also include a second transistor coupled to the first transistor and having a gate coupled to an input node of the circuit.

Abstract: A method and circuit are provided for implementing enhanced CMOS inverter based optical Transimpedance Amplifiers (TIAs). A transimpedence amplifer (TIA) includes a photo-detector, and the TIA is formed by a first TIA inverter and a second TIA inverter. The first TIA inverter has an input from a cathode side of the photo-detector and the second inverter has an input from an anode side of the photo-detector. A replica TIA is formed by two replica inverters, coupled to a respective input to a first operational amplifier and a second operational amplifier. The first operational amplifier and the second operational amplifier have a feedback configuration for respectively regulating a set voltage level at the cathode side of the photo-detector input of the first inverter and at the anode side of the photo-detector input of the second inverter.

Abstract: A method and circuit are provided for implementing enhanced CMOS inverter based optical Transimpedance Amplifiers (TIAs). A transimpedence amplifer (TIA) includes a photo-detector, and the TIA is formed by a first TIA inverter and a second TIA inverter. The first TIA inverter has an input from a cathode side of the photo-detector and the second inverter has an input from an anode side of the photo-detector. A replica TIA is formed by two replica inverters, coupled to a respective input to a first operational amplifier and a second operational amplifier. The first operational amplifier and the second operational amplifier have a feedback configuration for respectively regulating a set voltage level at the cathode side of the photo-detector input of the first inverter and at the anode side of the photo-detector input of the second inverter.

Abstract: A circuit component comprises a row of transistors. The row may contain a first active FET with a source region and a drain region. The row may also contain a first active dummy FET that shares the source region and that also has a diffusion region. The row may also contain a second active FET and a second active dummy FET, positioned such that the active dummy FETs are located between the active FETs on the row. The row may also have an end positioned such that the first active dummy FET is between the end and the first active FET. A supply of current may be electrically connected to the source diffusion regions. A load region may be electrically connected to the drain region. The first active FET and the first active dummy FET may have gates that share a voltage source or that have their own voltage source.

Abstract: A dark photodiode that is optically isolated from the signal photodiode and having a dark current in the absence of photons. A reference generating circuit configured to produce a reference voltage based on voltage at an anode of the signal photodiode. A voltage regulator circuit configured to regulate dark photodiode voltage at an anode of the dark photodiode based on the reference voltage. A current mirror circuit configured to produce, at an anode connecting to the signal photodiode, a mirrored current that is a mirrored version of a portion of the dark current.

Abstract: A method and circuit are provided for implementing enhanced CMOS inverter based optical Transimpedance Amplifiers (TIAs). A transimpedence amplifer (TIA) includes a photo-detector, and the TIA is formed by a first TIA inverter and a second TIA inverter. The first TIA inverter has an input from a cathode side of the photo-detector and the second inverter has an input from an anode side of the photo-detector. A replica TIA is formed by two replica inverters, coupled to a respective input to a first operational amplifier and a second operational amplifier. The first operational amplifier and the second operational amplifier have a feedback configuration for respectively regulating a set voltage level at the cathode side of the photo-detector input of the first inverter and at the anode side of the photo-detector input of the second inverter.

Abstract: A method and circuit are provided for implementing enhanced CMOS inverter based optical Transimpedance Amplifiers (TIAs). A transimpedence amplifer (TIA) includes a photo-detector, and the TIA is formed by a first TIA inverter and a second TIA inverter. The first TIA inverter has an input from a cathode side of the photo-detector and the second inverter has an input from an anode side of the photo-detector. A replica TIA is formed by two replica inverters, coupled to a respective input to a first operational amplifier and a second operational amplifier. The first operational amplifier and the second operational amplifier have a feedback configuration for respectively regulating a set voltage level at the cathode side of the photo-detector input of the first inverter and at the anode side of the photo-detector input of the second inverter.