Abstract: A DC-DC converter is disclosed having an electronic switch network having a supply node, a ground node, an output node, a first inductor node, a second inductor node, and switch control inputs. An inductor is coupled between the first inductor node and the second inductor node. Control logic circuitry has switch control outputs coupled to the switch control inputs, wherein the control logic circuitry is configured to cause the electronic switch network to couple the inductor between the supply node and the output node to provide current flow through the inductor for a fixed time period, and at the end of the fixed time period to measure a check time period until the current flow through the inductor is equal to predetermined current value, and based upon the measured check time period to determine to switch between buck operation and boost operation or boost operation and buck operation.

Abstract: A method of detecting a signal in radio frequency identification (RFID) transponder (FIG. 1) is disclosed. The method includes receiving a signal (FIG. 7) having a first time in a first logic state (high) and having a second time in a second logic state (low). A weight (700, 702) is determined in response to the first time and the second time. An output signal (from A2D) is produced in response to the weight and one of the first and second logic states.

Abstract: Chopper stabilized operational amplifiers are in common use. One drawback of these amplifiers, however, is that there is an inherent tone present at the chopper frequency. Conventional circuits have attempted to reduce the effects of this tone by using various filtering schemes, such as a notch filter. Here, however, a track-and-hold circuit is used in conjunction with matched amplifiers to compensate for this tone.

Abstract: A method of detecting a signal in radio frequency identification (RFID) transponder (FIG. 1) is disclosed. The method includes receiving a signal (FIG. 7) having a first time in a first logic state (high) and having a second time in a second logic state (low). A weight (700, 702) is determined in response to the first time and the second time. An output signal (from A2D) is produced in response to the weight and one of the first and second logic states.

Abstract: Various systems and methods for low power identification are described herein. For example, a radio frequency device including a radio frequency energy receiver. The radio frequency energy receiver is operable to receive a radio frequency energy and to convert the radio frequency energy to a DC current. In addition, the device further includes a first clock generator that generates a first clock at a first frequency and second clock generator that generates another clock based on the first clock. The first clock generator includes a duty cycle correction circuit. The second clock has a positive going clock edge for each edge of the first clock.

Abstract: A random number generator generates a string of random bits from a received RF signal source. A sample-and-hold circuit is coupled to the received RF signal source. The RF signal is sampled by a jittered clock signal from a source coupled to the sample-and-hold circuit. The frequency of the jittered clock signal is less than frequency of the received RF signal. The random number appears at the output of the sample-and-hold circuit.

Abstract: A voltage regulation circuit for an RFID circuit having a voltage limiter circuit including a current sensing element for sensing current through the voltage limiter circuit. The voltage limiter generates a limited voltage. A voltage regulator is coupled to the limited voltage for generating a regulated output voltage. The voltage regulator has a dynamic biasing current responsive to an output of the sensing element for increasing bandwidth of the voltage regulator when current in the voltage limiter circuit increases.

Abstract: A low noise AC coupled amplifier having transistors sharing bias currents, and having a low band-pass corner frequency and consuming low power. The amplifier may be used in a magneto-resistive (MR) preamplifier to amplify a response from a MR sensor. Bipolar and MOS transistors are used in the front end, utilizing the advantages of each transistor type to achieve low noise as well as low band-pass corner. The amplifier has a modified structure achieving lower power by using a PNP transistor instead of an NPN transistor.

Abstract: The power on reset circuit includes: a comparator; a resistor string having a first end coupled to a first supply node of the comparator, a first tap point node coupled to a first input of the comparator, and a second end coupled to a second input of the comparator; and a diode connected transistor device coupled between the second end of the resistor string and a second supply node of the comparator.

Abstract: The present invention discloses a circuit (10) adapted to compensate for RMR variations and shunt resistance across the RMR comprising a first current source (idc1) coupled to a first resistor (r1), a second current source (idc2) coupled to a second resistor (r2), wherein the first resistor (r1) and the second resistor (r2) are coupled, a resistive sensor (RMR) coupled on either side to a third resistor (r3) and to a fourth resistor (r4), and a transconductance feedback block (GM) coupled to the resistive sensor (RMR), the third resistor (r3), and to the fourth resistor (r4).

Abstract: A write current circuit (300, 400) adapted to drive a thin film write head (202) of a mass media information storage device. The write current circuit (300, 400) further includes programming circuitry (311, 411) driven such that parameters of the write current waveform can be varied, including the write current overshoot amplitude and/or overshoot duration. The present invention achieves technical advantages by providing the ability to program out or adjust for system introduced asymmetries in the write current waveform.

Abstract: A preamplifier device (26) for a thin film transducer disk drive system having operation speeds up to and greater than 2 Gb/s. The device (26) includes a low power/high speed driver (203) having a cascaded Class AB buffer. In at least one embodiment the device (26) includes separated drive devices in the driver (203) and H-bridge circuit (205) realized in multiple smaller devices biased separately to reduce transistor self-heating effects and a further embodiment includes a reference (201) having a base cancellation scheme and a Class AB current source for improving accuracy and stability is such high speed devices.

Abstract: An apparatus for use with a sensor includes first and second signal treating circuit segments coupled with the sensor for presenting a substantially balanced differential signaling representation of output signals from the sensor. Each respective signal treating circuit segment comprises a plurality of circuit elements having different electrical symmetries coupled in parallel and establishing a plurality of parallel signal paths having asymmetric signal handling characteristics. A feedback circuit is coupled with the first and second signal treating circuit segments and provides feedback signals to selected circuit elements in each of the first and second signal treating circuit segments. The feedback signals effect substantially balanced signal handling among the selected circuit elements having similar electrical symmetries.

Abstract: The present invention describes a voltage-mode boosting write driver circuit (160), comprising a plurality of inputs (WDP, WDN), a plurality of outputs (HWX, HWY), a transducer (L2), a flex interconnection (T1) coupled to the outputs (HWX, HWY) and to the transducer (L2), a first resistor (R15) and a second resistor (R43) coupled to the outputs (HWX, HWY) and to the transducer (L2), an H-switch (Q15, Q60, Q11, Q22) coupled to the resistors (R15, R43), and a plurality of top boosting circuits (Q42, Q47, R36, and Q43, Q48, R37) coupled to the outputs (HWX, HWY).

Abstract: The present invention discloses a circuit (10) adapted to compensate for RMR variations and shunt resistance across the RMR comprising a first current source (idc1) coupled to a first resistor (r1), a second current source (idc2) coupled to a second resistor (r2), wherein the first resistor (r1) and the second resistor (r2) are coupled, a resistive sensor (RMR) coupled on either side to a third resistor (r3) and to a fourth resistor (r4), and a transconductance feedback block (GM) coupled to the resistive sensor (RMR), the third resistor (r3), and to the fourth resistor (r4).

Abstract: A write driver circuit (38) uses a matching resistors (R0, R1) to match the impedance of the head (32) disposed between output nodes (OUTP, OUTN). Control circuitry (Q4, Q5, Q6, Q7, R2, R4, R6 and R7) maintains the voltage at reference voltage nodes (VREFP, REFN) at essentially the same voltage as its corresponding output node. The matching resistor is disposed between the reference voltage node and the output node along with a driver (40a, 40b), which may be implemented as an AB driver. Since the voltage between the reference node and the output node is generally zero, very little current is shunted by the matching resistors, and thus, there is very little power wasted by the matching resistors. In the preferred embodiment, the output transistors of the AB drivers are driven by switched current sources (Q28 and Q29) to provide enhanced current to the bases of the output transistors on an as needed basis.

Abstract: The present invention discloses an impedance matched low noise amplifier circuit (10) comprising a serially coupled first resistor (R1) and first transistor (R0), a serially coupled second resistor (R2) and second transistor (R1), a resistive sensor (RMR) coupled to the first transistor (R0) and the second transistor (R1), wherein the first resistor (R1) and the second resistor (R2) are coupled, and a transconductance feedback block (GM) coupled to the resistive sensor (RMR) and to the serially coupled resistors (R1, R2) and transistors (R0, R1).