Abstract: A PFM-type voltage regulator circuit converts an unregulated input voltage into a regulated output voltage using a first transistor controlled by a pulse control circuit and a second transistor controlled by a linear regulator circuit. The linear regulator circuit controls the second transistor when the regulated output voltage falls to a predetermined minimum target voltage level, thereby maintaining the regulated output voltage at the minimum target voltage level. The pulse control circuit detects the current passing through the second transistor, and in response generates a pulse signal having a predetermined duration that fully turns on the first transistor. The voltage through the first transistor is converted to an increasing inductor current that refreshes the regulated output voltage to a maximum target voltage level. When the pulse signal ends, the regulated output voltage again begins to fall toward the predetermined minimum target voltage level, and the cycle is repeated.

Abstract: The present invention provides an apparatus and method for encoding and/or decoding signals. The encoding apparatus includes a variable impedance being coupled with an encoder. The variable impedance establishes a select voltage at the encoder. The encoder is further coupled with an input signal, wherein the encoder generates a modulated output as dictated by the select voltage. The decoding apparatus includes an integrator, a comparator and at least a first variable impedance. The integrator couples with the comparator, and is configured to receive an encoded signal and to generate an average DC voltage, such that the comparator receives the average DC voltage. The first variable impedance coupled with the comparator, and dictates a first limit such that the comparator receives the first limit. The comparator is configured to generate a decoded signal if the average DC voltage is at least equal to the first limit.

Abstract: The present invention provides an apparatus and method for optimizing the efficiency of a switching converter for converting a first voltage to a second voltage. The apparatus includes a regulator, a DC-to-DC converter and a controller. The controller couples with both the regulator and DC-to-DC converter, and the controller is configured to activate and deactivate the regulator and the DC-to-DC converter depending on an output demand. In one embodiment, the controller is configured to activate the regulator and deactivate the DC-to-DC converter when the output demand transitions from a first demand level to a second demand level. The controller is further configured to activate the DC-to-DC converter and to deactivate the regulator when the output demand transitions from the second demand level to the first demand level. The apparatus is configured to monitor demand, and to activate the DC-to-DC converter when demand is in a first state or activate the regulator when demand is in a second state.

Abstract: The present invention provides an apparatus and method for optimizing the efficiency of a switching converter for converting a first voltage to a second voltage. The apparatus includes a regulator, a DC-to-DC converter and a controller. The controller couples with both the regulator and DC-to-DC converter, and the controller is configured to activate and deactivate the regulator and the DC-to-DC converter depending on an output demand. In one embodiment, the controller is configured to activate the regulator and deactivate the DC-to-DC converter when the output demand transitions from a first demand level to a second demand level. The controller is further configured to activate the DC-to-DC converter and to deactivate the regulator when the output demand transitions from the second demand level to the first demand level. The apparatus is configured to monitor demand, and to activate the DC-to-DC converter when demand is in a first state or activate the regulator when demand is in a second state.

Abstract: The present invention provides an apparatus and method for encoding and/or decoding signals. The encoding apparatus includes a variable impedance being coupled with an encoder. The variable impedance establishes a select voltage at the encoder. The encoder is further coupled with an input signal, wherein the encoder generates a modulated output as dictated by the select voltage. The decoding apparatus includes an integrator, a comparator and at least a first variable impedance. The integrator couples with the comparator, and is configured to receive an encoded signal and to generate an average DC voltage, such that the comparator receives the average DC voltage. The first variable impedance coupled with the comparator, and dictates a first limit such that the comparator receives the first limit. The comparator is configured to generate a decoded signal if the average DC voltage is at least equal to the first limit.

Abstract: In accordance with the present invention, trim pads used in trimming on-chip resistive elements are formed in the scribe channels interposed between respective dice on a wafer. Metal traces connect the trim pads to their associated resistive elements formed on the dice. Thus, each trim pad formed within the scribe channels results in a corresponding increase in the usable silicon surface area of the dice, thereby saving valuable silicon real estate.