Abstract: A pipelined delta-sigma modulator (PDSM) analog to digital converter (ADC) architecture is disclosed where each stage of the pipelined ADC includes a delta sigma modulator with a digital low pass filter and a corresponding analog low pass filter that precisely matches the digital low pass filter. An error signal is generated at each stage based on the difference of the low pass filtered analog input and the low pass filtered digital output of the delta sigma modulator (after converting to an analog signal). The digital outputs of each stage are passed through the appropriate low pass filter stages so all digital signals have been subjected to the same filtering prior to combining in a digital error correction circuit. The present invention also uses a compensation filter to correct any errors in the pass band caused by the low pass filtering and to help reject unwanted noise outside the pass band.

Abstract: A bandpass analog to digital converter includes M single channel delta sigma modulators having N-bit quantizer outputs arranged in a parallel configuration and operated at a predetermined sample frequency (fs). The modulator outputs are time interleaved and digitally combined in a manner that provides performance characteristics comparable to a modulator with a sample frequency of Mfs. Thus, bandpass center frequencies that are much higher than conventional single channel architectures are achievable. Single channel first order modulator bandpass center frequencies are restricted to fc=fs/4. However, a range of center frequencies approaching Mfs/2 is supported. This increased frequency capability is obtained while maintaining the delta sigma noise shaping near the higher bandpass center frequencies to reduce the effects of quantization noise. This results in a high signal to noise ratio with a corresponding high resolution at the much higher center frequencies.

Abstract: A bandpass analog to digital converter includes M single channel delta sigma modulators having N-bit quantizer outputs arranged in a parallel configuration and operated at a predetermined sample frequency (fs). The modulator outputs are time interleaved and digitally combined in a manner that provides performance characteristics comparable to a modulator with a sample frequency of Mfs. Thus, bandpass center frequencies that are much higher than conventional single channel architectures are achievable. Single channel first order modulator bandpass center frequencies are restricted to fc=fs/4. However, a range of center frequencies approaching Mfs/2 is supported. This increased frequency capability is obtained while maintaining the delta sigma noise shaping near the higher bandpass center frequencies to reduce the effects of quantization noise. This results in a high signal to noise ratio with a corresponding high resolution at the much higher center frequencies.