Abstract: A cover assembly for a display device, such as a three-dimensional liquid crystal (3-D LCD) display. The cover assembly includes an aluminosilicate glass substrate that is substantially free of retardance-induced visual defects and has a thickness of less than 2 mm, a retardance of less than or equal to 5 nm over an area of at least 170 in2 (20 in diagonal), a 4-point bend strength of greater than 150 MPa.

Abstract: A cover assembly for a display device, such as a three-dimensional liquid crystal (3-D LCD) display. The cover assembly includes an aluminosilicate glass substrate that is substantially free of retardance-induced visual defects and has a thickness of less than 2 mm, a retardance of less than or equal to 5 nm over an area of at least 170 in2 (20 in diagonal), a 4-point bend strength of greater than 150 MPa.

Abstract: A large, efficient, high power collimated backlight assembly has a highly reflective, substantially closed, thin rectangular light cavity containing highly reflective surfaces and one or more light sources. One of the large faces of the cavity is a light exit plate which contains a transmissive, light collimating structure. The cavity side of the collimating structure includes a highly reflective white planar structure containing an array of circular apertures with minimal sidewall absorption. The apertures are centered on the optical axis and located near the focal distance of a closely packed array of hemispherical or spherical lenses located on the outer surface of the collimating structure. Light rays are trapped between the highly reflective surfaces of the cavity, light sources, and aperture walls, until they enter the lenses, which output the majority of rays that enter in a collimated beam.

Abstract: The present invention features are series of techniques for designing and assembling of large, robust monolithic and monolithic-like flat panel displays. Many techniques originally developed for creating tiled, flat-panel displays having visually imperceptible seams may be advantageously applied to monolithic structures. These techniques include single-sided wiring, two-sided wiring from opposite sides, segmented row and column lines, and reordering row and column lines in fan-out region. Single-sided wiring facilitates the construction of displays with small outlines. By using these techniques, display sharpness and contrast may be improved. In addition, color and luminance balance and uniformity across the display may also be improved.

Abstract: The present invention features designs of pixels and designs of control features for seals on AMLCD tiles optimized for tiling AMLCD flat panel displays (FPDs) which have visually imperceptible seams. The FPD structure has an image view plane which is continuous and remote from the pixel apertures or image source plane on the inside of the tiles. The image is formed on the view plane by a distributed ultra low magnification flies-eye optical system (a screen) that is integrated with the tiles, effectively excluding and obscuring an image of the seams. The innovations described herein minimize the defects on the perimeter pixels by effectively damming the waviness of the front of the seal near the perimeter pixels on the tiles. Dark space required for the seal between the interior tile edges and active regions of the pixels is decreased, as is the space allocated for wiring thereby increasing the feasible aperture ratios near the mosaic edges and all apertures.

Abstract: The present invention features a series of techniques for designing and assembling of large, robust monolithic and monolithic-like flat panel displays. Many techniques originally developed for creating tiled, flat-panel displays having visually imperceptible seams may be advantageously applied to monolithic structures. These techniques include single-sided wiring, two-sided wiring from opposite sides, segmented row and column lines, and reordering row and column lines in fan-out region. Single-sided wiring facilitates the construction of displays with small outlines. By using these techniques, display sharpness and contrast may be improved. In addition, color and luminance balance and uniformity across the display may also be improved.

Abstract: The present invention features designs of pixels and designs of control features for seals on AMLCD tiles optimized for tiling AMLCD flat panel displays (FPDs) which have visually imperceptible seams. The FPD structure has an image view plane which is continuous and remote from the pixel apertures or image source plane on the inside of the tiles. The image is formed on the view plane by a distributed ultra low magnification flies-eye optical system (a screen) that is integrated with the tiles, effectively excluding and obscuring an image of the seams. The innovations described herein minimize the defects on the perimeter pixels by effectively damming the waviness of the front of the seal near the perimeter pixels on the tiles. Dark space required for the seal between the interior tile edges and active regions of the pixels is decreased, as is the space allocated for wiring thereby increasing the feasible aperture ratios near the mosaic edges and all apertures.

Abstract: The present invention features techniques for designing large, robust monolithic and monolithic-like displays having good brightness and contrast over a wide range of viewing angles. These techniques include controlling the layout of the pixel array and its access circuits that modify the electrical characteristics in order to minimize undesirable optical, electro-optical, and ambient light aberrations and any electronic anomalies creating visually perceptible discontinuities or boundaries. These artifacts are reduced to levels that allow for better color correction. In addition, the use of optical components such as collimators, light enhancing films, diffusers, screens, polarizers and masks are described. The resulting displays present luminance and chromaticity outputs from areas of originally varying optical response that become uniform within the tolerances of the human visual system.

Abstract: The present invention features methods and apparatuses for sealing tiled, flat-panel displays (FPDs). Tile edges corresponding with the display's perimeter edges are designed with a wide seal. Interior edges, however, have narrow seals in order to maintain the desired, constant, pixel pitch across tile boundaries. In some cases, this invention applies specifically to arrays of tiles 2×2 or less, and, in other cases, to N×M arrays, where N and M are any integer numbers. The tiles are enclosed with top and bottom glass plates, which are sealed with an adhesive bond to the tiles on the outside perimeter of the tiled display. Vertical seams (where tiles meet at the perimeter of the FPD) are sealed with a small amount of polymer. The seal may be constructed between a cover plate and a back plate, sandwiching the tiles. The AMLCD edges may be coated with either a non-permeable material or a polymer having an extremely low permeability (for example, Parylene™).

Abstract: The present invention features are series of techniques for designing and assembling of large, robust monolithic and monolithic-like flat panel displays. Many techniques originally developed for creating tiled, flat-panel displays having visually imperceptible seams may be advantageously applied to monolithic structures. These techniques include single-sided wiring, two-sided wiring from opposite sides, segmented row and column lines, and reordering row and column lines in fan-out region. Single-sided wiring facilitates the construction of displays with small outlines. By using these techniques, display sharpness and contrast may be improved. In addition, color and luminance balance and uniformity across the display may also be improved.

Abstract: The present invention features designs of pixels and designs of control features for seals on AMLCD tiles optimized for tiling AMLCD flat panel displays (FPDs) which have visually imperceptible seams. The FPD structure has an image view plane which is continuous and remote from the pixel apertures or image source plane on the inside of the tiles. The image is formed on the view plane by a distributed ultra low magnification flies-eye optical system (a screen) that is integrated with the tiles, effectively excluding and obscuring an image of the seams. The innovations described herein minimize the defects on the perimeter pixels by effectively damming the waviness of the front of the seal near the perimeter pixels on the tiles. Dark space required for the seal between the interior tile edges and active regions of the pixels is decreased, as is the space allocated for wiring thereby increasing the feasible aperture ratios near the mosaic edges and all apertures.

Abstract: The present invention features are series of techniques for designing and assembling of large, robust monolithic and monolithic-like flat panel displays. Many techniques originally developed for creating tiled, flat-panel displays having visually imperceptible seams may be advantageously applied to monolithic structures. These techniques include single-sided wiring, two-sided wiring from opposite sides, segmented row and column lines, and reordering row and column lines in fan-out region. Single-sided wiring facilitates the construction of displays with small outlines. By using these techniques, display sharpness and contrast may be improved. In addition, color and luminance balance and uniformity across the display may also be improved.

Abstract: The present invention features a series of techniques for designing and assembling of large, robust monolithic and monolithic-like flat panel displays. Many techniques originally develope for creating tiled, flat-panel displays having visually imperceptible seams may be advantageously applied to monolithic structures. These techniques include single-sided wiring, two-sided wiring from opposite sides, segmented row and column lines, and reordering row and column lines in fan-out region. Single-sided wiring facilitates the construction of displays with small outlines. By using these techniques, display sharpness and contrast may be improved. In addition, color and luminance balance and uniformity across the display may also be improved.

Abstract: The present invention features designs of pixels and designs of control features for seals on AMLCD tiles optimized for tiling AMLCD flat panel displays (FPDs) which have visually imperceptible seams. The FPD structure has an image view plane which is continuous and remote from the pixel apertures or image source plane on the inside of the tiles. The image is formed on the view plane by a distributed ultra low magnification flies-eye optical system (a screen) that is integrated with the tiles, effectively excluding and obscuring an image of the seams. The innovations described herein minimize the defects on the perimeter pixels by effectively damming the waviness of the front of the seal near the perimeter pixels on the tiles. Dark space required for the seal between the interior tile edges and active regions of the pixels is decreased, as is the space allocated for wiring thereby increasing the feasible aperture ratios near the mosaic edges and all apertures.

Abstract: The present invention features are series of techniques for designing and assembling of large, robust monolithic and monolithic-like flat panel displays. Many techniques originally developed for creating tiled, flat-panel displays having visually imperceptible seams may be advantageously applied to monolithic structures. These techniques include single-sided wiring, two-sided wiring from opposite sides, segmented row and column lines, and reordering row and column lines in fan-out region. Single-sided wiring facilitates the construction of displays with small outlines. By using these techniques, display sharpness and contrast may be improved. In addition, color and luminance balance and uniformity across the display may also be improved.

Abstract: The present invention features methods and apparatuses for sealing tiled, flat-panel displays (FPDs). Tile edges corresponding with the display's perimeter edges are designed with a wide seal. Interior edges, however, have narrow seals in order to maintain the desired, constant, pixel pitch across tile boundaries. In some cases, this invention applies specifically to arrays of tiles 2×2 or less, and, in other cases, to N×M arrays, where N and M are any integer numbers. The tiles are enclosed with top and bottom glass plates, which are sealed with an adhesive bond to the tiles on the outside perimeter of the tiled display. Vertical seams (where tiles meet at the perimeter of the FPD) are sealed with a small amount of polymer. The seal may be constructed between a cover plate and a back plate, sandwiching the tiles. The AMLCD edges may be coated with either a non-permeable material or a polymer having an extremely low permeability (for example, Parylene™).

Abstract: The present invention features designs of pixels and designs of control features for seals on AMLCD tiles optimized for tiling AMLCD flat panel displays (FPDs) which have visually imperceptible seams. The FPD structure has an image view plane which is continuous and remote from the pixel apertures or image source plane on the inside of the tiles. The image is formed on the view plane by a distributed ultra low magnification flies-eye optical system (a screen) that is integrated with the tiles, effectively excluding and obscuring an image of the seams. The innovations described herein minimize the defects on the perimeter pixels by effectively damming the waviness of the front of the seal near the perimeter pixels on the tiles. Dark space required for the seal between the interior tile edges and active regions of the pixels is decreased, as is the space allocated for wiring thereby increasing the feasible aperture ratios near the mosaic edges and all apertures.

Abstract: The present invention features a tiled, flat-panel, color display that has a color-correction capability. The display is a tiled mosaic of individual display tiles, such as AMLCDs. Column and row inputs that are typically provided for a single display tile system are distributed over a plurality of display tiles. The color purity is achieved for the display by sorting the tiles into groups, matching their color coordinates, and correcting non-uniformities optically (e.g., by using a graded neutral density filter having a grading function being the inverse of the brightness distribution non-uniformities) and/or electronically. Then, each individual tile in the mosaic is color-corrected via a multiplexed, controller/driver circuit.

Abstract: The present invention features methods and apparatus for the correction of spatial non-uniformities in brightness that arise from materials, manufacturing, operational and lighting parameter variations in electronic color, flat-panel displays. The methods apply both to gradual non-uniformities usually found in monolithic displays as well as to abrupt variations present in displays composed of a multitude of tiles. Corrections are performed on the electronic drive signals used to control the brightness of selected display pixels. Parameters required for these corrections are acquired via brightness measurements over selected pixels and stored after suitable transformations. The stored parameters are then used to scale and/or interpolate drive signals in real time. Corrections are performed such that any remaining gradual and abrupt brightness non-uniformities fall below the detectable threshold under the intended viewing conditions.

Abstract: The present invention features flat-panel displays having a mosaic of tiles, and methods of constructing and sealing them. Sealing designs are described to maintain appropriate vacuum levels for FEDs, PFPDs and LCDs. The mosaic of tiles forming a flat-panel display may include subassembly tiles, with each consisting of two, unsealed, substantially parallel plates having a structure positioned between them; these are known as s-tiles. The tiles may be enclosed by a cover plate and backplate. Non-permeable material may be deposited on the cover plate and the backplate, with solderable metal overlaid on the non-permeable material. A metallized, non-permeable spacer/connector is also located between the cover plate and backplate for hermetically sealing the perimeter of the display. A set of electrical-interconnection, metal feed-throughs can also be positioned in the non-permeable spacer/connector.