Patents by Inventor Raymond Giordano

Raymond Giordano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Current limiting circuit with rapid response feedback loop
    Patent number: 7005924
    Abstract: The current limiting circuit of the present invention includes a transconductance amplifier having two outputs and forming a conventional feedback loop. A first output connects to an output transistor and a second output is a replica output used to form a rapid response feedforward path to control the gate of the output transistor, for example, an external MOSFET.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: February 28, 2006
    Assignee: Intersil Americas Inc.
    Inventors: Sumer Can, William B. Shearon, Raymond Giordano
  • Current limiting circuit with rapid response feedback loop
    Publication number: 20050184809
    Abstract: The current limiting circuit of the present invention includes a transconductance amplifier having two outputs and forming a conventional feedback loop. A first output connects to an output transistor and a second output is a replica output used to form a rapid response feedforward path to control the gate of the output transistor, for example, an external MOSFET.
    Type: Application
    Filed: July 8, 2004
    Publication date: August 25, 2005
    Applicant: Intersil Americas Inc.
    Inventors: Sumer Can, William Shearon, Raymond Giordano
  • Tracking soft start circuit
    Publication number: 20050105307
    Abstract: A tracking soft start circuit architecture contains a plurality of soft start circuits for generating a plurality of soft start voltages during startup for application to associated power supply terminals of a power supply system. The soft start circuits are interconnected in such a manner that prevents any soft start circuit from generating a soft start voltage waveform until all of the controlled power output devices have been brought to the same prescribed state of operation, that is, all power FET gates are precharged and their source voltages match each other.
    Type: Application
    Filed: January 14, 2004
    Publication date: May 19, 2005
    Applicant: Intersil Americas Inc. State of Incorporation: Delaware
    Inventors: William Shearon, Raymond Giordano, Sumer Can