Patents by Inventor Raymond Joe

Raymond Joe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210402636
    Abstract: Guide systems to facilitate marking a workpiece. The guide systems include a platform and a set of guides. The platform flanks the workpiece on two sides and includes a first member and a second member. The second member is spaced from the first member. The set of guides includes a first guide and a second guide. The first guide has a first profile edge. The second guide is spaced from the first guide and has a second profile edge. A tool may be pressed against the first profile edge or the second profile edge to form a mark on the workpiece corresponding to the first profile edge or the second profile edge, respectively. In some examples, the guide system includes adjustable guides. In other examples, guides are fixed.
    Type: Application
    Filed: June 30, 2021
    Publication date: December 30, 2021
    Inventor: Raymond Joe Mus
  • Patent number: 8012859
    Abstract: A method is provided for depositing silicon and silicon-containing films by atomic layer deposition (ALD). The method includes disposing the substrate in a batch processing system configured for performing ALD of the silicon-containing film, exposing the substrate to a non-saturating amount of a first precursor containing silicon, and evacuating or purging the first precursor from the batch processing system. The method further includes exposing the substrate to a saturating amount of a second precursor containing silicon or a dopant, where only one of the first and second precursors contain a halogen, and a reaction of the first and second precursors on the substrate forms a silicon or silicon-containing film and a volatile hydrogen-halogen (HX) by-product, evacuating or purging the second precursor and the HX by-product from the batch processing system, and repeating the exposing and evacuation or purging steps until the silicon or silicon-containing film has a desired thickness.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: September 6, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Raymond Joe, Meenakshisundaram Gandhi
  • Patent number: 7964441
    Abstract: A method is provided for low temperature catalyst-assisted atomic layer deposition of silicon-containing films such as SiO2 and SiN. The method includes exposing a substrate surface containing X—H functional groups to a first R1—X—R2 catalyst and a gas containing silicon and chlorine to form an X/silicon/chlorine complex on the surface, and forming a silicon-X layer terminated with the X—H functional groups by exposing the X/silicon/chlorine complex on the substrate surface to a second R1—X—R2 catalyst and a X—H functional group precursor. The method further includes one or more integrated in-situ reactive treatments that reduce or eliminate the need for undesired high-temperature post-deposition processing. One reactive treatment includes hydrogenating unreacted X—H functional groups and removing carbon and chlorine impurities from the substrate surface. Another reactive treatment saturates the silicon-X layer with additional X—H functional groups.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: June 21, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Raymond Joe, Meenakshisundaram Gandhi
  • Patent number: 7737051
    Abstract: A method for using a silicon germanium (SiGe) surface layer to integrate a high-k dielectric layer into a semiconductor device. The method forms a SiGe surface layer on a substrate and deposits a high-k dielectric layer on the SiGe surface layer. An oxide layer, located between the high-k dielectric layer and an unreacted portion of the SiGe surface layer, is formed during one or both of deposition of the high-k dielectric layer and an annealing process after deposition of the high-k dielectric layer. The method further includes forming an electrode layer on the high-k dielectric layer.
    Type: Grant
    Filed: March 10, 2004
    Date of Patent: June 15, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Anthony Dip, Pradip K. Roy, Sanjeev Kaushal, Allen J. Leith, Seungho Oh, Raymond Joe
  • Patent number: 7604841
    Abstract: A method for extending time between chamber cleaning processes in a process chamber of a processing system. A particle-reducing film is formed on a chamber component in the process chamber to reduce particle formation in the process chamber during substrate processing, at least one substrate is introduced into the process chamber, a manufacturing process is performed in the process chamber, and the at least one substrate is removed from the process chamber. The particle-reducing film may be deposited on a clean chamber component or on a material deposit formed on a chamber component. Alternatively, the particle-reducing film may be formed by chemically modifying at least a portion of a material deposit on a chamber component. The particle-reducing film may be formed after each manufacturing process or at selected intervals after multiple manufacturing processes.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: October 20, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Raymond Joe, John Gumpher, Anthony Dip
  • Publication number: 20080241358
    Abstract: A method is provided for low temperature catalyst-assisted atomic layer deposition of silicon-containing films such as SiO2 and SiN. The method includes exposing a substrate surface containing X—H functional groups to a first R1—X—R2 catalyst and a gas containing silicon and chlorine to form an X/silicon/chlorine complex on the surface, and forming a silicon-X layer terminated with the X—H functional groups by exposing the X/silicon/chlorine complex on the substrate surface to a second R1—X—R2 catalyst and a X—H functional group precursor. The method further includes one or more integrated in-situ reactive treatments that reduce or eliminate the need for undesired high-temperature post-deposition processing. One reactive treatment includes hydrogenating unreacted X—H functional groups and removing carbon and chlorine impurities from the substrate surface. Another reactive treatment saturates the silicon-X layer with additional X—H functional groups.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Applicant: TOKYO ELECTON LIMITED
    Inventors: Raymond Joe, Meenakshisundaram Gandhi
  • Publication number: 20080210273
    Abstract: Photoresist stripping is provided that employs batch processing to maximize throughput and an upstream plasma activation source using vapor or gas processing to efficiently create reactive species and minimize chemical consumption. An upstream plasma activation source efficiently creates reactive species remote from the photoresist on the substrate surfaces. Either a remote plasma generator upstream of the processing chamber or an integrated plasma unit within the processing chamber upstream of the processing volume may be used. Plasma processing gas is introduced from a side of a stack of wafers and flows across the wafers. Processing gas may be forced across the surfaces of the wafers in the column to an exhaust on the opposite side of the column, and the column may be rotated. An upstream plasma activation source enables a strip process to occur at low temperatures, for example below 600 degrees C., which are particularly advantageous in BEOL process flow.
    Type: Application
    Filed: May 9, 2008
    Publication date: September 4, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Raymond Joe
  • Patent number: 7411693
    Abstract: An image data dissemination system and method for anticipating user image requests from a user workstation and for locating, transforming and, as necessary, migrating anticipated representations of image data files to a local storage area for efficient access. An anticipated image request is determined based on a number of factors including the image retrieval historical information associated with a user and/or the user workstation. An anticipated representation of the image data file is also determined. An image data file that satisfies the anticipated image request and is in the anticipated representation is then identified, copied and stored in an optimal local storage area. When a user workstation generates the anticipated image request, the corresponding image data file stored on the optimal local storage area is provided the user workstation.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: August 12, 2008
    Assignee: AGFA Inc.
    Inventors: Evgueni Nikos Loukipoudis, Raymond Joe Brunsting, Jeffery Frederick Avery
  • Patent number: 7387968
    Abstract: Photoresist stripping is provided that employs batch processing to maximize throughput and an upstream plasma activation source using vapor or gas processing to efficiently create reactive species and minimize chemical consumption. An upstream plasma activation source efficiently creates reactive species remote from the photoresist on the substrate surfaces. Either a remote plasma generator upstream of the processing chamber or an integrated plasma unit within the processing chamber upstream of the processing volume may be used. Plasma processing gas is introduced from a side of a stack of wafers and flows across the wafers. Processing gas may be forced across the surfaces of the wafers in the column to an exhaust on the opposite side of the column, and the column may be rotated. An upstream plasma activation source enables a strip process to occur at low temperatures, for example below 600 degrees C., which are particularly advantageous in BEOL process flow.
    Type: Grant
    Filed: November 8, 2005
    Date of Patent: June 17, 2008
    Assignee: Tokyo Electron Limited
    Inventor: Raymond Joe
  • Patent number: 7326655
    Abstract: A method for forming an oxide layer on a substrate. The method includes exposing a process gas containing H2, an oxygen-containing gas, and a halogen-containing oxidation accelerant gas to the substrate, where the process chamber is maintained at a subatmospheric pressure, and forming an oxide layer through thermal oxidization of the substrate by the process gas. According to one embodiment of the invention, the substrate can be maintained at a temperature between about 150° C. and about 900° C. A microstructure containing an oxide layer is described, where the oxide layer can be a gate dielectric oxide layer or an interface oxide layer integrated with a high-k layer.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: February 5, 2008
    Assignee: Tokyo Electron Limited
    Inventor: Raymond Joe
  • Publication number: 20070189356
    Abstract: A system is provided for determining when the buildup of deposits in an exhaust line of a semiconductor wafer processing machine requires cleaning. Deposits in vacuum exhaust lines build up to where they eventually fail structurally, releasing particles that can contaminate equipment and processes. The time at which cleaning is required is often unpredictable, while frequent or early cleaning to avoid waiting too long unnecessarily reduces productivity. The invention provides for the monitoring of thermal properties on the inside of an exhaust line wall. Deposits cause changes in the monitored thermal properties. A heater and thermocouple can be used, for example, and the temperature at the thermocouple that is due to heat flow from the heater is measured. Buildups in the exhaust line affect heat flow to the sensor and are measurable as a decline in sensed temperature. Structural failure of the coating in the exhaust line leads to the eventual leveling off and fluctuation of the temperature measurement.
    Type: Application
    Filed: February 13, 2006
    Publication date: August 16, 2007
    Inventors: Jonathan Pettit, Raymond Joe
  • Publication number: 20070105392
    Abstract: Photoresist stripping is provided that employs batch processing to maximize throughput and an upstream plasma activation source using vapor or gas processing to efficiently create reactive species and minimize chemical consumption. An upstream plasma activation source efficiently creates reactive species remote from the photoresist on the substrate surfaces. Either a remote plasma generator upstream of the processing chamber or an integrated plasma unit within the processing chamber upstream of the processing volume may be used. Plasma processing gas is introduced from a side of a stack of wafers and flows across the wafers. Processing gas may be forced across the surfaces of the wafers in the column to an exhaust on the opposite side of the column, and the column may be rotated. An upstream plasma activation source enables a strip process to occur at low temperatures, for example below 600 degrees C., which are particularly advantageous in BEOL process flow.
    Type: Application
    Filed: November 8, 2005
    Publication date: May 10, 2007
    Inventor: Raymond Joe
  • Publication number: 20070072438
    Abstract: A method for forming an oxide layer on a substrate. The method includes exposing a process gas containing H2, an oxygen-containing gas, and a halogen-containing oxidation accelerant gas to the substrate, where the process chamber is maintained at a subatmospheric pressure, and forming an oxide layer through thermal oxidization of the substrate by the process gas. According to one embodiment of the invention, the substrate can be maintained at a temperature between about 150° C. and about 900° C. A microstructure containing an oxide layer is described, where the oxide layer can be a gate dielectric oxide layer or an interface oxide layer integrated with a high-k layer.
    Type: Application
    Filed: September 29, 2005
    Publication date: March 29, 2007
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Raymond Joe
  • Patent number: 7165011
    Abstract: A method of monitoring a thermal processing system in real-time using a built-in self test (BIST) table that includes positioning a plurality of wafers in a processing chamber in the thermal processing system; executing a real-time dynamic model to generate a predicted dynamic process response for the processing chamber during the processing time; creating a first measured dynamic process response; determining a dynamic estimation error using a difference between the predicted dynamic process response and the measured dynamic process response; and comparing the dynamic estimation error to operational thresholds established by one or more rules in the BIST table.
    Type: Grant
    Filed: September 1, 2005
    Date of Patent: January 16, 2007
    Assignee: Tokyo Electron Limited
    Inventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima, Anthony Dip, David Smith, Raymond Joe, Sundar Gandhi
  • Patent number: 7129187
    Abstract: A method for low-temperature plasma-enhanced chemical vapor deposition of a silicon-nitrogen-containing film on a substrate. The method includes providing a substrate in a process chamber, exciting a reactant gas in a remote plasma source, thereafter mixing the excited reactant gas with a silazane precursor gas, and depositing a silicon-nitrogen-containing film on the substrate from the excited gas mixture in a chemical vapor deposition process. In one embodiment of the invention, the reactant gas can contain a nitrogen-containing gas to deposit a SiCNH film. In another embodiment of the invention, the reactant gas can contain an oxygen-containing gas to deposit a SiCNOH film.
    Type: Grant
    Filed: July 14, 2004
    Date of Patent: October 31, 2006
    Assignee: Tokyo Electron Limited
    Inventor: Raymond Joe
  • Patent number: 7022192
    Abstract: A semiconductor wafer susceptor for batch substrate processing. The susceptor includes a central region in a primary plane and a plurality of flat annular extensions extending below the central region in a secondary plane. The primary and secondary planes are parallel to each other. An edge of the substrate overhangs the central region allowing no contact of the susceptor with the substrate edge.
    Type: Grant
    Filed: September 4, 2002
    Date of Patent: April 4, 2006
    Assignee: Tokyo Electron Limited
    Inventors: Anthony Dip, Takanori Saito, Raymond Joe
  • Publication number: 20060014399
    Abstract: A method for low-temperature plasma-enhanced chemical vapor deposition of a silicon-nitrogen-containing film on a substrate. The method includes providing a substrate in a process chamber, exciting a reactant gas in a remote plasma source, thereafter mixing the excited reactant gas with a silazane precursor gas, and depositing a silicon-nitrogen-containing film on the substrate from the excited gas mixture in a chemical vapor deposition process. In one embodiment of the invention, the reactant gas can contain a nitrogen-containing gas to deposit a SiCNH film. In another embodiment of the invention, the reactant gas can contain an oxygen-containing gas to deposit a SiCNOH film.
    Type: Application
    Filed: July 14, 2004
    Publication date: January 19, 2006
    Inventor: Raymond Joe
  • Publication number: 20050221001
    Abstract: A method for extending time between chamber cleaning processes in a process chamber of a processing system. A particle-reducing film is formed on a chamber component in the process chamber to reduce particle formation in the process chamber during substrate processing, at least one substrate is introduced into the process chamber, a manufacturing process is performed in the process chamber, and the at least one substrate is removed from the process chamber. The particle-reducing film may be deposited on a clean chamber component or on a material deposit formed on a chamber component. Alternatively, the particle-reducing film may be formed by chemically modifying at least a portion of a material deposit on a chamber component. The particle-reducing film may be formed after each manufacturing process or at selected intervals after multiple manufacturing processes.
    Type: Application
    Filed: March 31, 2004
    Publication date: October 6, 2005
    Applicant: Tokyo Electron Limited of TBS Broadcast Center
    Inventors: Raymond Joe, John Gumpher, Anthony Dip
  • Publication number: 20050217799
    Abstract: A wafer heating assembly is described having a unique heater element for use in a single wafer processing systems. The heating unit includes a carbon wire element encased in a quartz sheath. The heating unit is as contamination-free as the quartz, which permits direct contact to the wafer. The mechanical flexibility of the carbon ‘wire’ or ‘braided’ structure permits a coil configuration, which permits independent heater zone control across the wafer. The multiple independent heater zones across the wafer can permit temperature gradients to adjust film growth/deposition uniformity and rapid thermal adjustments with film uniformity superior to conventional single wafer systems and with minimum to no wafer warping. The low thermal mass permits a fast thermal response that enables a pulsed or digital thermal process that results in layer-by-layer film formation for improved thin film control.
    Type: Application
    Filed: March 31, 2004
    Publication date: October 6, 2005
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: David O'Meara, Gerrit Leusink, Stephen Cabral, Anthony Dip, Cory Wajda, Raymond Joe
  • Publication number: 20050199877
    Abstract: A method for using a silicon germanium (SiGe) surface layer to integrate a high-k dielectric layer into a semiconductor device. The method forms a SiGe surface layer on a substrate and deposits a high-k dielectric layer on the SiGe surface layer. An oxide layer, located between the high-k dielectric layer and an unreacted portion of the SiGe surface layer, is formed during one or both of deposition of the high-k dielectric layer and an annealing process after deposition of the high-k dielectric layer. The method further includes forming an electrode layer on the high-k dielectric layer.
    Type: Application
    Filed: March 10, 2004
    Publication date: September 15, 2005
    Applicant: Tokyo Electron Limited of TBS Broadcast Center
    Inventors: Anthony Dip, Pradip Roy, Sanjeev Kaushal, Allen Leith, Seungho Oh, Raymond Joe