Patents by Inventor Raymond Jones
Raymond Jones has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250021506Abstract: An interface bridge to enable communication between a first integrated circuit die and a second integrated circuit die is disclosed. The two integrated circuit die may be connected via chip-to-chip interconnects. The first integrated circuit die may include programmable logic fabric. The second integrated circuit die may support the first integrated circuit die. The first integrated circuit die and the secondary integrated circuit die may communicate with one another via the chip-to-chip interconnects using an interface bridge. The first and second component integrated circuits may include circuitry to implement the interface bridge, which may provide source-synchronous communication using a data receive clock from the second integrated circuit die to the first integrated circuit die.Type: ApplicationFiled: September 27, 2024Publication date: January 16, 2025Inventors: Jeffrey Erik Schulz, David W. Mendel, Dinesh D. Patil, Gary Brian Wallichs, Keith Duwel, Jakob Raymond Jones
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Patent number: 12191893Abstract: A seemingly monolithic interface between separate integrated circuit die may appear to be parallel or asynchronous from the perspective of the separate integrated circuit die. The signals of the seemingly monolithic interface, however, may actually be communicated between the separate die via serial and/or synchronous communication. In one method, a number of signals stored in a first parallel interface on a first integrated circuit die may be sampled. In some cases, at least one of the signals may be sampled more often than another one of the signals. A serial signal may be generated based on sampled signals. The serial signal may be transmitted to a corresponding second parallel interface on the second integrated circuit die.Type: GrantFiled: July 26, 2021Date of Patent: January 7, 2025Assignee: ALTERA CORPORATIONInventors: David W. Mendel, Jeffrey Erik Schulz, Keith Duwel, Huy Ngo, Jakob Raymond Jones
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Patent number: 12168624Abstract: The present disclosure provides an improved scale inhibiting formulation that is effective, environmentally friendly, and does not add any organic compounds or traditional polymeric compounds to treated water. The scale inhibiting composition includes molecular clusters of polyammonium bisulfate (PABS), which can interact physically, chemically, or physio-chemically with one or more ions in the water or water-containing system being treated. That interaction inhibits scale accretion and/or removes previously formed scale.Type: GrantFiled: March 1, 2021Date of Patent: December 17, 2024Assignee: Earth Science Laboratories, Inc.Inventors: David Nicholas, Reid Henry Bowman, John A. Hatten, Jr., Freddie L. Singleton, Douglas Brian McKenzie, Murray Raymond Jones
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Patent number: 12135667Abstract: An interface bridge to enable communication between a first integrated circuit die and a second integrated circuit die is disclosed. The two integrated circuit die may be connected via chip-to-chip interconnects. The first integrated circuit die may include programmable logic fabric. The second integrated circuit die may support the first integrated circuit die. The first integrated circuit die and the secondary integrated circuit die may communicate with one another via the chip-to-chip interconnects using an interface bridge. The first and second component integrated circuits may include circuitry to implement the interface bridge, which may provide source-synchronous communication using a data receive clock from the second integrated circuit die to the first integrated circuit die.Type: GrantFiled: May 31, 2023Date of Patent: November 5, 2024Assignee: ALTERA CORPORATIONInventors: Jeffrey Erik Schulz, David W. Mendel, Dinesh D. Patil, Gary Brian Wallichs, Keith Duwel, Jakob Raymond Jones
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Patent number: 12038837Abstract: A data processing device incorporates a plurality of chiplets having working elements such as processing and memory elements. At least one of the working elements is operative to generate messages directed to working elements of the same chiplet or another one of the chiplets. Each message includes a global address. An evaluation circuit determines whether the global address of a message is within a range of global addresses assigned to the chiplet. If so, the message passes to a translation circuit which translates the message to a local address for routing to a working element of the chiplet. If not, the message is dispatched to one or more other chiplets.Type: GrantFiled: December 15, 2022Date of Patent: July 16, 2024Assignee: Google LLCInventors: Xi Chen, Chao Ni, Jakob Raymond Jones
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Publication number: 20240202115Abstract: A data processing device incorporates a plurality of chiplets having working elements such as processing and memory elements. At least one of the working elements is operative to generate messages directed to working elements of the same chiplet or another one of the chiplets. Each message includes a global address. An evaluation circuit determines whether the global address of a message is within a range of global addresses assigned to the chiplet. If so, the message passes to a translation circuit which translates the message to a local address for routing to a working element of the chiplet. If not, the message is dispatched to one or more other chiplets.Type: ApplicationFiled: December 15, 2022Publication date: June 20, 2024Inventors: Xi Chen, Chao Ni, Jakob Raymond Jones
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Publication number: 20230305982Abstract: An interface bridge to enable communication between a first integrated circuit die and a second integrated circuit die is disclosed. The two integrated circuit die may be connected via chip-to-chip interconnects. The first integrated circuit die may include programmable logic fabric. The second integrated circuit die may support the first integrated circuit die. The first integrated circuit die and the secondary integrated circuit die may communicate with one another via the chip-to-chip interconnects using an interface bridge. The first and second component integrated circuits may include circuitry to implement the interface bridge, which may provide source-synchronous communication using a data receive clock from the second integrated circuit die to the first integrated circuit die.Type: ApplicationFiled: May 31, 2023Publication date: September 28, 2023Inventors: Jeffrey Erik Schulz, David W. Mendel, Dinesh D. Patil, Gary Brian Wallichs, Keith Duwel, Jakob Raymond Jones
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Patent number: 11693810Abstract: An interface bridge to enable communication between a first integrated circuit die and a second integrated circuit die is disclosed. The two integrated circuit die may be connected via chip-to-chip interconnects. The first integrated circuit die may include programmable logic fabric. The second integrated circuit die may support the first integrated circuit die. The first integrated circuit die and the secondary integrated circuit die may communicate with one another via the chip-to-chip interconnects using an interface bridge. The first and second component integrated circuits may include circuitry to implement the interface bridge, which may provide source-synchronous communication using a data receive clock from the second integrated circuit die to the first integrated circuit die.Type: GrantFiled: December 24, 2021Date of Patent: July 4, 2023Assignee: Intel CorporationInventors: Jeffrey Erik Schulz, David W. Mendel, Dinesh D. Patil, Gary Brian Wallichs, Keith Duwel, Jakob Raymond Jones
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Publication number: 20230174402Abstract: The present disclosure provides an improved scale inhibiting formulation that is effective, environmentally friendly, and does not add any organic compounds or traditional polymeric compounds to treated water. The scale inhibiting composition includes molecular clusters of polyammonium bisulfate (PABS), which can interact physically, chemically, or physio-chemically with one or more ions in the water or water-containing system being treated. That interaction inhibits scale accretion and/or removes previously formed scale.Type: ApplicationFiled: March 1, 2021Publication date: June 8, 2023Applicant: Earth Science Laboratories, Inc.Inventors: DAVID NICHOLAS, REID HENRY BOWMAN, JOHN A. HATTEN, JR., FREDDIE L. SINGLETON, DOUGLAS BRIAN MCKENZIE, Murray Raymond Jones
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Patent number: 11663928Abstract: The embodiments disclose a method including using an on-demand roleplay network with internet connectivity to role playing study materials and real-time role playing sessions, connecting an on-demand roleplay application installed on role playing participant digital devices with the on-demand roleplay network to facilitate role playing partners real-time practice sessions, incorporating an artificial intelligence communicator coach analyzer with the on-demand roleplay network to provide role playing participants with nonverbal communication analysis and coaching, and providing role playing participants with a means to rate live practice sessions including the nonverbal communication skills.Type: GrantFiled: October 22, 2020Date of Patent: May 30, 2023Inventors: Thomas Ferry, David Shanks, Raymond Jones
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Patent number: 11377588Abstract: A well treatment fluid composition that includes a tetrakis(hydroxyorgano)phosphonium salt and 1,3-dimethylol-5,5-dimethylhydantoin. Methods for preparing a well treatment fluid composition and treating a subterranean formation are also presented.Type: GrantFiled: March 1, 2021Date of Patent: July 5, 2022Assignee: SOLVAY USA INC.Inventors: Christopher Raymond Jones, Stephanie Edmunds, Jean C. Molina
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Publication number: 20220190843Abstract: A seemingly monolithic interface between separate integrated circuit die may appear to be parallel or asynchronous from the perspective of the separate integrated circuit die. The signals of the seemingly monolithic interface, however, may actually be communicated between the separate die via serial and/or synchronous communication. In one method, a number of signals stored in a first parallel interface on a first integrated circuit die may be sampled. In some cases, at least one of the signals may be sampled more often than another one of the signals. A serial signal may be generated based on sampled signals. The serial signal may be transmitted to a corresponding second parallel interface on the second integrated circuit die.Type: ApplicationFiled: July 26, 2021Publication date: June 16, 2022Inventors: David W. Mendel, Jeffrey Erik Schulz, Keith Duwel, Huy Ngo, Jakob Raymond Jones
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Publication number: 20220130278Abstract: The embodiments disclose a method including using an on-demand roleplay network with internet connectivity to role playing study materials and real-time role playing sessions, connecting an on-demand roleplay application installed on role playing participant digital devices with the on-demand roleplay network to facilitate role playing partners real-time practice sessions, incorporating an artificial intelligence communicator coach analyzer with the on-demand roleplay network to provide role playing participants with nonverbal communication analysis and coaching, and providing role playing participants with a means to rate live practice sessions including the nonverbal communication skills.Type: ApplicationFiled: October 22, 2020Publication date: April 28, 2022Inventors: Thomas Ferry, David Shanks, Raymond Jones
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Publication number: 20220121595Abstract: An interface bridge to enable communication between a first integrated circuit die and a second integrated circuit die is disclosed. The two integrated circuit die may be connected via chip-to-chip interconnects. The first integrated circuit die may include programmable logic fabric. The second integrated circuit die may support the first integrated circuit die. The first integrated circuit die and the secondary integrated circuit die may communicate with one another via the chip-to-chip interconnects using an interface bridge. The first and second component integrated circuits may include circuitry to implement the interface bridge, which may provide source-synchronous communication using a data receive clock from the second integrated circuit die to the first integrated circuit die.Type: ApplicationFiled: December 24, 2021Publication date: April 21, 2022Inventors: Jeffrey Erik Schulz, David W. Mendel, Dinesh D. Patil, Gary Brian Wallichs, Keith Duwel, Jakob Raymond Jones
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Patent number: 11237998Abstract: An interface bridge to enable communication between a first integrated circuit die and a second integrated circuit die is disclosed. The two integrated circuit die may be connected via chip-to-chip interconnects. The first integrated circuit die may include programmable logic fabric. The second integrated circuit die may support the first integrated circuit die. The first integrated circuit die and the secondary integrated circuit die may communicate with one another via the chip-to-chip interconnects using an interface bridge. The first and second component integrated circuits may include circuitry to implement the interface bridge, which may provide source-synchronous communication using a data receive clock from the second integrated circuit die to the first integrated circuit die.Type: GrantFiled: December 22, 2020Date of Patent: February 1, 2022Assignee: Intel CorporationInventors: Jeffrey Erik Schulz, David W. Mendel, Dinesh D. Patil, Gary Brian Wallichs, Keith Duwel, Jakob Raymond Jones
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Patent number: 11191276Abstract: The present invention relates to a solid formulation of soap stick type comprising a primary surfactant, at least one binding agent and at least one dispersant that may especially be an amphoteric surfactant, optionally with additives. The present invention also relates to uses of said formulation, especially for oilfield applications, e.g. for gas well deliquification applications.Type: GrantFiled: May 20, 2019Date of Patent: December 7, 2021Assignee: RHODIA OPERATIONSInventors: Christopher Raymond Jones, Kevan Hatchman, Alan Christopher Fellows
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Patent number: 11100029Abstract: An interface bridge to enable communication between a first integrated circuit die and a second integrated circuit die is disclosed. The two integrated circuit die may be connected via chip-to-chip interconnects. The first integrated circuit die may include programmable logic fabric. The second integrated circuit die may support the first integrated circuit die. The first integrated circuit die and the secondary integrated circuit die may communicate with one another via the chip-to-chip interconnects using an interface bridge. The first and second component integrated circuits may include circuitry to implement the interface bridge, which may provide source-synchronous communication using a data receive clock from the second integrated circuit die to the first integrated circuit die.Type: GrantFiled: August 8, 2019Date of Patent: August 24, 2021Assignee: Intel CorporationInventors: Jeffrey Erik Schulz, David W. Mendel, Dinesh D. Patil, Gary Brian Wallichs, Keith Duwel, Jakob Raymond Jones
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Patent number: 11075648Abstract: A seemingly monolithic interface between separate integrated circuit die may appear to be parallel or asynchronous from the perspective of the separate integrated circuit die. The signals of the seemingly monolithic interface, however, may actually be communicated between the separate die via serial and/or synchronous communication. In one method, a number of signals stored in a first parallel interface on a first integrated circuit die may be sampled. In some cases, at least one of the signals may be sampled more often than another one of the signals. A serial signal may be generated based on sampled signals. The serial signal may be transmitted to a corresponding second parallel interface on the second integrated circuit die.Type: GrantFiled: September 27, 2019Date of Patent: July 27, 2021Assignee: Intel CorporationInventors: David W. Mendel, Jeffrey Erik Schulz, Keith Duwel, Huy Ngo, Jakob Raymond Jones
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Publication number: 20210179927Abstract: A well treatment fluid composition that includes a tetrakis(hydroxyorgano)phosphonium salt and 1,3-dimethylol-5,5-dimethylhydantoin. Methods for preparing a well treatment fluid composition and treating a subterranean formation are also presented.Type: ApplicationFiled: March 1, 2021Publication date: June 17, 2021Applicant: SOLVAY USA INC.Inventors: Christopher Raymond Jones, Stephanie Edmunds, Jean C. Molina
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Publication number: 20210109883Abstract: An interface bridge to enable communication between a first integrated circuit die and a second integrated circuit die is disclosed. The two integrated circuit die may be connected via chip-to-chip interconnects. The first integrated circuit die may include programmable logic fabric. The second integrated circuit die may support the first integrated circuit die. The first integrated circuit die and the secondary integrated circuit die may communicate with one another via the chip-to-chip interconnects using an interface bridge. The first and second component integrated circuits may include circuitry to implement the interface bridge, which may provide source-synchronous communication using a data receive clock from the second integrated circuit die to the first integrated circuit die.Type: ApplicationFiled: December 22, 2020Publication date: April 15, 2021Inventors: Jeffrey Erik Schulz, David W. Mendel, Dinesh D. Patil, Gary Brian Wallichs, Keith Duwel, Jacob Raymond Jones