Patents by Inventor Raymond Komow

Raymond Komow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8656329
    Abstract: A system and method are provided for generating a programmably implemented model which emulates a power delivery network serving an integrated circuit (IC) core in an electronic system. The system and method generally comprise measures for establishing a power integrity (PI) topology including models for a voltage regulator module that generates at least one predetermined supply voltage level, and for a conductive power rail portion of the power delivery network (PDN). The system and method further comprise measures for interconnecting to the conductive power rail portion model a first behavioral model indicative of the current consumption characteristics of the IC core, and a second behavioral model indicative of the current consumption of an IO interface buffer driving an output signal of the electronic system.
    Type: Grant
    Filed: December 27, 2010
    Date of Patent: February 18, 2014
    Assignee: Cadence Design Systems, Inc.
    Inventors: Taranjit Singh Kukal, Feras Al-Hawari, Dennis Nagle, Raymond Komow, Jilin Tan
  • Patent number: 8484605
    Abstract: A model library contains one or more storable models of a physical system each constructed by numerically solving relationships between a characteristic of the physical system given a set of model parameters. Such a model may be retrieved from the library according to values assigned to the model parameters and used to determine a corresponding characteristic of the physical system without repeating the numerical solution method originally used to create the model. Instead, a mapping may be applied to the storable model to seamlessly obtain the characteristic upon request.
    Type: Grant
    Filed: September 8, 2008
    Date of Patent: July 9, 2013
    Assignee: Cadence Design Systems, Inc.
    Inventors: Jilin Tan, Shangli Wu, Roger Cleghorn, Raymond Komow, Paul Musto, Shu Ye
  • Patent number: 8452582
    Abstract: A method and system are provided for parametrically adapting a behavioral model pre-configured for a preset supply reference level to fluctuations therein. The behavioral model is adaptively scaled for deviation of the electronic system supply reference from its preset level. The scaling includes reconstructing a surrogate device parametrically representative of a portion of the behavioral model's undisclosed circuit. The reconstruction includes pre-setting a transistor type for the surrogate device, such that the surrogate device is configured with a conductive channel current-voltage characteristic of the preselected transistor type. Device-specific properties for the surrogate device are generated based on selective cross-correlation of operating points between the conductive channel current-voltage characteristic and V-t and I-V curves associated with the behavioral model.
    Type: Grant
    Filed: December 29, 2010
    Date of Patent: May 28, 2013
    Assignee: Cadence Design Systems, Inc.
    Inventors: Feras Al-Hawari, Taranjit Singh Kukal, Dennis Nagle, Raymond Komow, Jilin Tan
  • Patent number: 8286110
    Abstract: A system and method is provided for generating a programmably implemented model which emulates a power delivery network serving an integrated circuit (IC) core in an electronic system. The system and method generally comprise measures for establishing a power integrity (PI) topology including models for a voltage regulator module that generates at least one predetermined supply voltage level, and for a conductive power rail portion of the power delivery network (PDN). The system and method further comprise measures for interconnecting to the conductive power rail portion model a first behavioral model indicative of the current consumption characteristics of the IC core, and a second behavioral model indicative of the current consumption of an IO interface buffer driving an output signal of the electronic system.
    Type: Grant
    Filed: December 27, 2010
    Date of Patent: October 9, 2012
    Assignee: Cadence Design Systems, Inc.
    Inventors: Taranjit Singh Kukal, Feras Al-Hawari, Dennis Nagle, Raymond Komow, Jilin Tan
  • Publication number: 20100070934
    Abstract: A model library contains one or more storable models of a physical system each constructed by numerically solving relationships between a characteristic of the physical system given a set of model parameters. Such a model may be retrieved from the library according to values assigned to the model parameters and used to determine a corresponding characteristic of the physical system without repeating the numerical solution method originally used to create the model. Instead, a mapping may be applied to the storable model to seamlessly obtain the characteristic upon request.
    Type: Application
    Filed: September 8, 2008
    Publication date: March 18, 2010
    Applicant: Cadence Design Systems, Inc.
    Inventors: Jilin Tan, Shangli Wu, Roger Cleghorn, Raymond Komow, Paul Musto, Shu Ye